Rambus Inc.

Inapac Technology, Inc.

Naresh Baliga

Adrian E Ong

Chiate Lin

An apparatus and method for a processor-memory unit for use in system-in-package (SiP) and system-in-package (SiP) integrated circuit devices. The apparatus includes a processing module, a memory module and a programmable system module. The programmable system module is configured to function as an interface between the memory module and the processing module, or as an interface between the memory module and a testing device. The invention facilitates integration and testing of processor-memory units including functional components having different communication protocols.

Processor-memory unit for use in system-in-package and system-in-module devices

A system is provided for testing a first integrated circuit associated with at least a second integrated circuit in a semiconductor device, wherein at least some external terminals for the semiconductor device are to be shared by the first and second integrated circuits, and wherein the first integrated circuit is designed for normal operation and a test mode. The system includes a plurality of multiplexer circuits. Each multiplexer circuit is operable to receive a respective signal from the second integrated circuit when the first integrated circuit is in normal operation. Each multiplexer circuit is further operable to receive a respective signal from either the second integrated circuit or an associated external terminal when the first integrated circuit is in test mode. An external terminal of the semiconductor device operable to receive a signal for causing the first integrated circuit to transition between normal operation and the test mode.

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El Dorado Hills, CA, United States of America

Naresh Baliga