Cadence Design Systems, Inc.

Simplex Solutions, Inc.

Siprosys, Inc.

Narain D Arora

Li J Song

Aki Fujimura

Rimma A Pirogova

Jian Wang

The present invention relates to techniques for measuring integrated circuit interconnect process parameters. The techniques are applicable to any non-ideally shaped interconnects made from any type of conductive materials. Test structures are fabricated within an integrated circuit. Non-destructive electrical measurements are taken from the test structures to determine coupling capacitances associated with the test structures. A field solver uses the initial process parameters to determine design coupling capacitances. An optimizer then uses the measured coupling capacitances and the design coupling capacitances to determine the interconnect process parameters.

Measurement of integrated circuit interconnect process parameters

A system that facilitates non-invasive in-line characterization of parameters of VLSI circuit interconnects is provided. A plurality of micro-electro-mechanical system (MEMS) cantilevers apply voltage(s) to VLSI circuit interconnect(s) without physical contact thereto. A measuring component measures deflection characteristics of the cantilevers, the deflection(s) correspond to electrical forces generated from the applied voltage(s) as passed through VLSI circuit interconnect(s). A component computes characteristics of the VLSI interconnect based at least in part upon the measured deflection characteristics.

Non-contact method and apparatus for on-line interconnect characterization in VLSI circuits

A method for measuring the coupling capacitance between two interconnect lines of an integrated circuit structure having a ground plane. The steps include shorting the first and second lines together and measuring a first capacitance (Ct) between the ground plane and the shorted first and second lines; eliminating the short between the first and second lines; shorting the first line to the ground plane and measuring a second capacitance (C1) between the second line and the shorted ground plane and first line; eliminating the short between the first line and the ground plane; shorting the second line to the ground plane and measuring a third capacitance (Cc) between the first line and the shorted ground plane and second line; and determining the coupling capacitance between the first line and the second line according to the formula Cc=(C1+C2-Ct)/2.

Growing community of inventors

San Jose, CA, United States of America

Narain D Arora