Texas Instruments Corporation

Nara Won

Dong-Ik Ko

Debasish Nag

Ching-Yu Hung

A method and apparatus for fixing a depth map wrap-around error and a depth map coverage by a confidence map. The method includes dynamically determining a threshold for the confidence map threshold based on an ambient light environment, wherein the threshold is reconfigurable depending on LED light strength distribution in TOF sensor, extracting, via the digital processor, four phases of Time Of Flight raw data from the Time Of Flight sensor data, computing a phase differential signal array for fixed point utilizing the four phases of the Time Of Flight raw data, computing the depth map, confidence map and the average light signal strength utilizing the phase differential signal array, obtaining the dynamic confidence map threshold for wrap around error correction utilizing the average light signal strength, and correcting the depth map wrap-around error utilizing the depth map, the confidence map and the dynamic confidence map threshold.

Method and apparatus for controlling time of flight confidence map based depth noise and depth coverage range

A method and apparatus for Time Of Flight sensor 2-dimensional and 3-dimensional map generation. The method includes retrieving Time Of Flight sensor fixed point data to obtain four phases of Time Of Flight fixed point raw data, computing Gray scale image array and phase differential signal arrays utilizing four phases of TOF fixed point raw data, computing Gray image array and Amplitude image array for fixed point, converting the phase differential signal array from fixed point to floating point, performing the floating point division for computing Arctan, TOF depthmap, and 3-dimensional point cloud map for Q format fixed point, and generating depthmap, 3-dimensional cloud coefficients and 3-dimensional point cloud for Q format fixed point.

Method and apparatus for time of flight sensor 2-dimensional and 3-dimensional map generation

An extension to current multiple memory bank video processing architecture is presented. A more powerful memory controller is incorporated, allowing computation of multiple memory addresses at both the input and the output data paths making possible new combinations of reads and writes at the input and output ports. Matrix transposition computations required by the algorithms used in image and video processing are implemented in MAC modules and memory banks. The technique described here can be applied to other parallel processors including future VLIW DSP processors.

Parallel architecture for matrix transposition

In order to overcome the limitation of the integrated circuit chip inter-connectability resulting from the physical dimensions of the leads, a radio frequency transmitter and/or a radio frequency receiver are included in the integrated circuit chip. Logic signal groups from one integrated circuit chip can be encoded by the modulation on the radio frequency signal and received and decoded by a second integrated circuit chip. The transmitted signal groups can be transmitted in a series format or in a parallel format. Either amplitude or frequency modulation can be used to impose information on the carrier frequency.

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Irvine, CA, United States of America

Nara Won