Mitsubishi Denki Kabushiki Kaisha

Hitachi, Ltd.

Renesas Technology Corp.

Ryoden Semiconductor System Engineering Corporation

Naoto Ueda

Shunichi Abe

Yoshirou Nishinaka

Yoshihiro Tomita

Hideyuki Ichiyama

Kazunari Michii

Toshio Takeuchi

Motoaki Satoyama

Naohiro Fujii

Koji Honami

Katsuyuki Fukutome

Nobuyuki Saika

Jun Tamura

Satoshi Yamada

Tetsuya Ueda

Masatoshi Yasunaga

Yoshihiro Kashiba

Michitaka Kimura

Kiyoaki Tsumura

Hideki Taniguchi

Hitoshi Fujimoto

Goro Izuta

Yoichi Goi

Takashi Miyamoto

Hideo Kameda

Seizou Ohumae

Katunori Asai

Ken Yamamura

Hitoshi Sasaki

Yutaka Koyama

Masaaki Namatame

A system, comprising: a file server coupled to a plurality of client terminals; and an archive server coupled to the file server via a network. The file server is configured to: provide an area for storing data recognizable by each of the plurality of client terminals; determine whether to store first data into the first storage device based on an attribute of a first storage area in a case where an addition request for storing the first data into the first storage area is received from a client terminal; and transmit the addition request to the archive server. The archive server is configured to store the first data into the second storage device in a case where the addition request is received.

System, data management method, and file server

A high-performance and highly-reliable snapshot management apparatus and method, and a storage system are provided that can prevent the adverse influence of overhead when they retain a multiplicity of snapshots. An operational volume is set in a storage area provided by a first storage apparatus and a plurality difference volumes are set in a storage area provided by a second storage apparatus. In response to data writing to the operational volume, difference data is saved in the difference volumes and management tables for it are created, with each snapshot being managed according to the management tables. Each management table is divided according to one or more snapshots in accordance with the snapshot creation time. The second and any following management tables store specified inheritance information to inherit the content of the preceding management tables.

Snapshot management apparatus and method, and storage system

A high-performance and highly-reliable snapshot management apparatus and method, and storage system are provided that can prevent the adverse influence of overhead when they retain a multiplicity of snapshots. An operational volume is set in a storage area provided by a first storage apparatus and a plurality difference volumes are set in a storage area provided by a second storage apparatus. In response to data writing to the operational volume, difference data is saved in the difference volumes and management tables for it are created, with each snapshot being managed according to the management tables. Each management table is divided according to one or more snapshots in accordance with the snapshot creation time. The second and any following management tables store specified inheritance information to inherit the content of the preceding management tables.

The invention is intended for rendering a CMOS camera compact and less costly. A semiconductor device constituting a CMOS camera system includes a lens unit which includes a wiring board having an image pick-up opening formed therein and a lens, and the lens is provided on one side of the wiring board and positioned opposite the image pick-up opening. An image pick-up semiconductor is provided on the other side of the wiring board, and is positioned opposite the image pick-up opening, and is connected to a connection section of the wiring board by means of flip-chip bonding. An image processing semiconductor is connected by means of flip-chip bonding to another connection section provided on the other side of the wiring board, and processes an image signal output from the image pick-up semiconductor.

Semiconductor device constituting a CMOS camera system

A semiconductor device includes a buffer region having buffers and disposed along a side of a semiconductor chip; a pad region having pads corresponding to the buffers and disposed outside the buffer region on the semiconductor chip; signal lines connecting the buffers to corresponding pads; and power supply lines and ground lines connected to extra pads, either of the power supply lines or the ground lines being partially superimposed on part of and separated from the signal lines by insulating layers.

Semiconductor device

A leadframe for producing a semiconductor device having a lead-on chip (LOC) structure with leads extending across a semiconductor chip, the leadframe includes a frame for a die pad having an outer frame section, a die pad displaced from the outer frame section, and a suspending lead connecting the die pad to the outer frame section with the die pad disposed inside the outer frame section; and a frame for leads including an outer frame portion and leads extending from opposite sides of the outer frame portion, connected to the frame for a die pad, the die pad being connected to the frame for leads at the suspending lead, wherein one of the frame for a die pad and the frame for leads includes a projection and the other of the frame for a die pad and the frame for leads includes a hole, the hole receiving the projection, the projection being disposed parallel to the frame for leads, connecting the frame for a die pad to the frame for leads.

Lead frame including frame-cutting slit for lead-on-chip (LOC)

A high-reliability semiconductor device and a method of producing the device. Absorption of moisture into a semiconductor device is effectively avoided by using a hard solder material, such as common solder having no moisture absorption, for die-bonding a semiconductor chip to a die pad. Thus, in the semiconductor device in accordance with the present inventions there are no corrosion problems nor package-cracking due to absorbed moisture.

Leadframe including frame-cutting slit for lead-on-chip (LOC)

A method of making a semiconductor device having a lead-on-chip structure includes bending a die pad extending from an outer frame outwardly from the outer frame. Thereafter, with the die pad in a convenient position, a semiconductor chip is die-bonded to the die pad. Thereafter, the die pad is bent back toward the outer frame so that it is generally parallel to but spaced from the outer frame with leads extending from the outer frame being generally parallel to the semiconductor chip. Electrodes of the semiconductor chip are connected by wire-bonding to the leads extending from the outer frame. After resin molding, the outer frame lying outside the resin package is severed and removed, completing the lead-on-chip semiconductor device.

Method of making leadframe for lead-on-chip (LOC) semiconductor device

A solder material comprises a first solder plate and a second solder plate having a thickness equal to or larger than 1 micron provided at the both surfaces of the first solder plate comprising material-having a lower melting point than the first solder or material which reacts with the first solder to produce an alloy having a lower melting point than the first solder. A junctioning method comprise putting the above-described solder material inserted between two objects to be junctioned to each other; heating the solder material to a temperature higher than the melting point of the second solder or the alloy and lower than the melting point of said first solder thereby to melt the second solder or the alloy; and thereafter cooling or keeping the solder material at a temperature in the vicinity of the melting point thereby to junction the objects to be junctioned to each other. The second solder plate has preferably a thickness less than 5 microns and the first solder plate has preferably a thickness equal to or larger than 30 microns. By this construction, the interval between the objects to be junctioned can be controlled to a predetermined thickness and the stress functioning to the objects can be relaxed as well as there arises no positional deviation between the objects.

Solder material, junctioning method, junction material, and

A semiconductor device including a lead on chip structure employs two frames. One of the frames includes a die pad and an outer frame portion and the other frame includes a plurality of leads and an outer lead portion. After a semiconductor chip is die bonded to the die pad, the two frames are connected to each other with the leads extending across the semiconductor chip. Slits within the second frame provide access to parts of the outer frame of the first frame and the first frame is severed at those slits. The severed portions of the first frame are removed after which the leads of the second frame are connected by wire bonding to the semiconductor chip. Finally, the semiconductor chip, the remaining part of the first frame, and the second frame are encapsulated in a resin with leads extending from the resin. The remaining parts of the outer frame of the second frame are removed by cutting and the exposed leads outside the resin are formed into a desired shape.

Method of making a lead on chip (LOC) semiconductor device

In a method of manufacturing a semiconductor device, overlaid on a first lead frame including a die pad supported by a plurality of die pad suspending leads is a second lead frame having connecting leads wherein the first and second lead frames are disposed on a first molding die such that the die pad and inner lead portions of the inner leads of the second lead frame are accommodated within a first cavity of the first molding die while offset portions of the die pad suspending leads are disposed outside of the first cavity. A second molding die is clamped onto the first molding die to define a resin molding chamber which is then filled with a molten resin to form a package. After removing the package from the first and second molding dies, the offset portions are cut away from the package while cutting the connecting leads to a predetermined length. A semiconductor chip as large as permissible can be embedded within a semiconductor device of a standard size while ensuring high quality and improved reliability of the semiconductor device.

Method of manufacturing a semiconductor device

A solder material comprises a first solder plate and a second solder plate having a thickness equal to or larger than 1 micron provided at the both surfaces of the first solder plate comprising material having a lower melting point than the first solder or material which reacts with the first solder to produce an alloy having a lower melting point than the first solder. A junctioning method comprises putting the above-described solder material inserted between two objects to be junctioned to each other; heating the solder material to a temperature higher than the melting point of the second solder or the alloy and lower than the melting point of said first solder thereby to melt the second solder or the alloy; and thereafter cooling or keeping the solder material at a temperature in the vicinity of the melting point thereby to junction the objects to be junctioned to each other. The second solder plate has preferably a thickness less than 5 microns and the first solder plate has preferably a thickness equal to or larger than 30 microns. By this construction, the interval between the objects to be junctioned can be controlled to a predetermined thickness and the stress functioning to the objects can be relaxed as well as there arises no positional deviation between the objects.

A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms part of a resin package.

Semiconductor device and method of producing the same

In a manufacturing method for a semiconductor device, first, a diffused layer of a soldering material is provided previously either on the reverse surface of a die or on the obverse surface of a die pad. Then, a diffusing layer is formed on either surface of the diffused layer. The diffusing layer between the die and the die pad is brought into contact with the die and die pad, and then these components are heated. The die is thereby and fully bonded to the die pad, even when the diffusing layer, which is an initial bonding layer, is made thinner. Because the time for the diffusing layer to diffuse can be shortened, the time for installing the die can also be shortened.

Growing community of inventors

Itami, Japan

Naoto Ueda