Fujitsu Corporation

Naoto Horiguchi

Tatsuya Usuki

Hiroshi Nakao

Toshiro Futatsugi

Kenichi Goto

Yoshihiro Sugiyama

Yoshiaki Nakata

Kenichi Imamura

Yoshimi Yamashita

Kenichi Hikazutani

Anri Nakajima

Shun-ichi Muto

Ken-ichi Okabe

A method of manufacturing semiconductor device comprising forms a first impurity diffusion region as a lower electrode of a capacitor in a first area of a semiconductor substrate by implanting impurities at a first dose; forms a second impurity diffusion region in a second area, at the end part of the semiconductor substrate, by implanting impurities at a second dose; and forms, by a thermal oxidation method, a capacitor insulation film having a first thickness on the first impurity diffusion region and forms an oxide film having a second thickness which is thicker than the first thickness on the second area.

Method of manufacturing semiconductor device

A semiconductor device is provided, which aims to reduce the standby power thereof by reducing the leak between a body and a drain with restraining the effect on a threshold voltage, in order to actualize the highly reliable semiconductor device. When extension regions are formed, an n-type impurity less diffusive than phosphorus (P), for example, arsenic (As) is used as an impurity. In addition to ordinary ion implantation with high dose (high concentration) and low acceleration energy, Asions are implanted with low dose and high acceleration energy.

Semiconductor device and manufacturing method thereof

A P-type pocket layer is formed in the surficial portion of a semiconductor substrate, a sidewall insulating film having a thickness of as thin as 10 nm or around is formed, and P is implanted therethrough to thereby form an N-type extension layer in the surficial portion of the p-type pocket layer. Then, a sidewall insulating film is formed, and P is implanted to thereby form an N-type source and a drain diffusion layer. P, having a larger coefficient of diffusion than that of conventionally-used As, used in the formation of the pocket layer can successfully moderate a strong electric field in the vicinity of the channel, and can consequently reduce leakage current between the drain and the semiconductor substrate and thereby reduce the off-leakage current, even if the gate length is reduced to 100 nm or shorter.

Semiconductor device and method of fabricating the same

A tunneling insulating film is formed on the partial surface area of a semiconductor substrate. A floating gate electrode is formed on the tunneling insulating film. A gate insulating film covers the side wall of the floating gate electrode and a partial surface area of the semiconductor substrate on both sides of the floating gate electrode. A first control gate electrode is disposed on the gate insulating film over the side wall of the floating gate electrode and over a partial surface area of the semiconductor substrate on both sides of the floating gate electrode. A pair of impurity doped regions is formed in a surface layer of the semiconductor substrate on both sides of a gate structure including the floating gate structure and first control gate structure.

Semiconductor memory with floating gate type FET

A non-volatile semiconductor memory comprising a semiconductor substrate, a gate insulating film formed on the substrate, and having a thin central section and thick end sections, a floating gate formed on the rate insulating film, an inter-electrode insulating film formed on the floating gate, a control gate formed on the inter-electrode insulating film, and source/drain regions formed in the substrate on both sides of the floating sate and having extensions extending under the thick end sections of the floating gate, and separated from the thin central section of the gate insulating film, wherein the thin central section enables tunneling of carriers at a low applied voltage, and thick end sections prevent tunneling of stored charges to the extensions and enhance retention of the stored charges.

Non-volatile semiconductor memory device having gate insulating film with thick end sections

To provide a semiconductor device which can retain information for a long period of time even in a case that the tunnel insulation film is thin. A semiconductor device comprises a first insulation film formed on a semiconductor substrate , a floating gate electrode formed on the first insulation film, a second insulation film formed on the floating gate electrode, and a control gate electrode formed on the second insulation film. A depletion layer is formed in the floating gate electrode near the first insulation film in a state that no voltage is applied between the floating gate electrode and the semiconductor substrate.

Semiconductor device and method for fabricating the same

A ferromagnetic tunnel junction random access memory includes a ferromagnetic tunnel junction structure including a first ferromagnetic layer, a second ferromagnetic layer disposed adjacent to the first ferromagnetic layer and having a fixed magnetization, and a tunnel insulator layer interposed between the first and second ferromagnetic layers; a conductor plug penetrating the first ferromagnetic layer, the tunnel insulator layer and the second ferromagnetic layer along a center axis; a first selection line coupled to a first end of the conductor plug; and a second selection line coupled to a second end of the conductor plug opposite to the first end. The first ferromagnetic layer has a generally ring shape surrounding the conductor plug and is insulated from the conductor plug. One of the first and second ferromagnetic layers has an antiferromagnetic layer pattern on a portion thereof.

Ferromagnetic tunnel junction random access memory, spin valve random access memory, single ferromagnetic layer random access memory, and memory cell array using the same

A single-electron device includes a substrate, an insulating film provided on the substrate, a plurality of nanometer-size conductive particles formed in the insulating film along an interface between the substrate and the insulating film, and an electrode provided on the insulating film, wherein the conductive particles have a generally identical size and arranged substantially in a plane at a depth closer to the substrate.

Single-electron device including therein nanocrystals

A wavelength-domain-multiplication memory comprises a first semiconductor layer including a first conductivity type impurity, a carrier barrier semiconductor layer formed on the first semiconductor layer, and quantum dots formed in the carrier barrier semiconductor layer.

Optical semiconductor memory device and read/write method therefor

A photo hole burning memory device includes a quantum dot and a quantum well layer cooperating with the quantum dot for storing information and a periodic structure that creates a photonic bandgap, wherein the periodic structure includes a local irregularity that forms a level in the photonic bandgap.

Growing community of inventors

Kawasaki, Japan

Naoto Horiguchi