Hitachi, Ltd.

Renesas Technology Corp.

Renesas Electronics Corporation

Tessera Advanced Technologies, Inc.

Rohm Co., Ltd.

Hitachi Chemical Company, Ltd.

Naotaka Tanaka

Takahiro Naito

Asao Nishimura

Akihiro Yaguchi

Yasuhiro Yoshimura

Makoto Kitano

Ichiro Anjoh

Akira Nagai

Ryuji Kohno

Yasuhiro Naka

Shuji Eguchi

Hideki Tanaka

Mamoru Mita

Hiroshi Kikuchi

Hideo Miura

Hiromichi Suzuki

Hiroyuki Ohta

Akio Takahashi

Masahiko Ogino

Haruo Akahoshi

Kazumasa Tanida

Toshiaki Ishii

Satoshi Nakamura

Junichi Saeki

Takashi Suga

Tatsuya Nagata

Takao Miwa

Masanori Segawa

Norio Nakazato

Satoru Isomura

Takashi Nakajima

Yoshiyuki Abe

Akio Hasebe

Kazunari Suzuki

Toshiyuki Hata

Kenichi Yamamoto

Chuichi Miyazaki

Ichio Shimizu

Masashi Sahara

Hiroshi Okabe

Akira Muto

Hisashi Tanie

Takashi Akazawa

Michihiro Kawashita

Tetsuo Kumazawa

Ikuo Yoshida

Isao Hirose

Satoshi Imasu

Ryo Haruta

Kenya Kawano

Takeshi Terasaki

Yoshihiko Nemoto

Hiroyasu Sasaki

Nae Yoneda

Hideko Ando

Fujiaki Nose

Yasuyuki Nakajima

Takashi Kubo

Ichirou Anjou

Masanori Fukuhara

Masayoshi Tsugane

Takafumi Kikuchi

Kisho Ashida

Yu Hasegawa

Junichi Arita

Hideo Arima

Yuji Shirai

Masaaki Yasuda

Masahiko Fujisawa

Yoshiyuki Kado

Yukihiro Kumagai

Akihiko Ohsaki

Nae Hisano

Yasuo Osone

Chiko Yorita

Tomoo Matsuzawa

Hiroshi Shintani

Toshihide Uematsu

Seiichi Tomoi

Ken Okutani

Chikako Imura

Kiyomi Kojima

Kenji Kohzu

Kosuke Kitaichi

Shinya Ogane

Kenji Kanemitsu

Koji Tasaki

In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.

Semiconductor device and method of manufacturing same

In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.

Semiconductor device and method of manufacturing the same

In a state where an adhesive tape is attached onto a main surface of a semiconductor wafer, a trench is formed in a rear surface of the semiconductor wafer. For forming the trench in the rear surface of the semiconductor wafer, after coating a resist film on the rear surface of the semiconductor wafer, the resist film is patterned by using the photolithography technology. The patterning of the resist film is performed so as not to leave the resist film in the region where the trench is to be formed. Then, the trench is formed in a predetermined region of the semiconductor wafer by the dry etching technology using the patterned resist film as a mask. Specifically, the trench is formed in the region near the dicing line.

Semiconductor device, semiconductor wafer and manufacturing method of the same

A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.

Manufacturing process and structure of through silicon via

When a through-hole electrode and a rear-surface wire are formed on a rear surface of a chip, a convex portion is formed on the rear surface of the chip due to a rear-surface wiring pad which is a part of the through-hole electrode and the rear-surface wire. This causes the air leakage when the chip is sucked, and therefore, the reduction of the sucking force of the chip occurs. A concave portion is formed in advance in a region where a rear-surface wiring pad and a rear-surface wire are formed. The rear-surface wiring pad and the rear-surface wire are provided inside the concave portion. Thus, a flatness of the rear surface of the chip is ensured by a convex portion caused by thicknesses of the rear-surface wiring pad and the rear-surface wire, so that the reduction of the sucking force does not occur when the chip is handled.

After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.

Manufacturing process of semiconductor device and semiconductor device

In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface-electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.

In a semiconductor device having a Low-k film as an interlayer insulator, peeling of the interlayer insulator in a thermal cycle test is prevented, thereby providing a highly reliable semiconductor device. In a semiconductor device having a structure in which interlayer insulators in which buried wires each having a main electric conductive layer made of copper are formed and cap insulators of the buried wires are stacked, the cap insulator having a relatively high Young's modulus and contacting by its upper surface with the interlayer insulator made of a Low-k film having a relatively low Young's modulus is formed so as not to be provided in an edge portion of the semiconductor device.

Semiconductor device

A semiconductor wafer comprising: a tubular trench formed at a position to form a through-hole electrode of a wafer; an insulating member buried inside the trench and on an upper surface of the trench; a gate electrode film and a metal film formed on an upper surface of the insulating member; a multilevel columnar wiring via formed on an upper surface of the metal film; and an external connection electrode formed electrically connected to the metal film via the multilevel columnar wiring via. In this manner, it is unnecessary to have a new process of dry etching to form a through-hole electrode after thinning the wafer and equipment development. Moreover, introduction of a specific design enables formation of through-hole electrodes with significantly reduced difficulties of respective processes.

Semiconductor wafer and method of manufacturing the same and method of manufacturing semiconductor device

In order to implement a high-density high-performance semiconductor system small in size, there is provided a method for implementing three-dimensional connection between a plurality of semiconductor chips differing from each other with the shortest metal interconnect length, using penetration electrodes, thereby enabling a fast operation at a low noise level, the method being a three-dimensional connection method very low in cost, and short in TAT in comparison with the known example, capable of bonding at an ordinary temperature, and excellent in connection reliability.

Semiconductor device and method of manufacturing thereof

A semiconductor device is provided with connection reliability between a bump electrode and a substrate electrode. An elastic modulus of an adhesive material used to electrically connect a metal bump and an interconnect pattern, and sealing the circuit surface of an LSI chip, after thermosetting is Ea; an elastic modulus of an insulating material of a packaging substrate surface layer after thermosetting is Eb; an elastic modulus of a core material, if used, is Ec, and the following rational expression is satisfied at normal temperature or a thermal contact bonding temperature of the adhesive material: at least Ea&#x3c;Eb&#x3c;Ec, preferably &#x2153;Eb&#x3c;Ea&#x3c;Eb&#x3c;3Ea(&#x3c;Ec). With this arrangement, a stable connection state can be attained irrespective of the level of the contact bonding load or fluctuations of it upon mass production and, therefore, high yield can be attained at low cost.

Semiconductor device and multilayer substrate therefor

Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.

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Kasumigaura, Japan

Naotaka Tanaka