Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kioxia Corporation

Kabushiki Kaisha Toshbia

Naoki Yasuda

Koichi Muraoka

Jun Fujiki

Masao Shingu

Shoko Kikuchi

Masaru Kito

Yasushi Nakasaki

Yoshiaki Fukuzumi

Akira Takashima

Daisuke Matsushita

Shosuke Fujii

Yukie Nishikawa

Tsunehiro Ino

Tomoharu Tanaka

Toru Tanzawa

Hiroshi Watanabe

Masumi Saitoh

Yuichiro Mitani

Masahiro Koike

Hirotaka Nishino

Akira Toriumi

Tatsuo Shimizu

Ryota Katsumata

Katsuyuki Sekine

Atsushi Kawasumi

Nobuo Hayasaka

Kosuke Tatsumura

Akira Nishiyama

Kiwamu Sakuma

Tomoko Fujiwara

Hideshi Miyajima

Hideki Satake

Masaaki Higuchi

Iwao Higashikawa

Yukio Nakabayashi

Shigeru Kawanaka

Kouichi Muraoka

Shuichi Toriyama

Tomoya Kawai

Haruka Sakuma

Nobuhito Kuge

Keiko Ariyoshi

Hirokazu Ishigaki

Izumi Hirano

Masaki Hotta

According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate. The semiconductor memory device also includes a memory hole that extends in the stacked body in the first direction and a semiconductor member that is disposed to extend in the memory hole in the first direction. The semiconductor memory device also includes a memory member that is disposed between the semiconductor member and the plurality of electrode members. The plurality of electrode members including a first electrode member and a second electrode member, a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.

Semiconductor memory device and method for manufacturing the same

A nonvolatile semiconductor storage device having a control gate formed on a semiconductor substrate and including a cylindrical through hole. A block insulating film, a charge storage film, a tunnel insulating film, and a semiconductor layer are formed on a side surface of the control gate inside the through hole. The tunnel insulating film includes a first insulating film having SiOas a base material and containing an element that lowers a band gap of the base material by being added. A density and a density gradient of the element monotonously increase from the semiconductor layer toward the charge storage film.

Nonvolatile semiconductor storage device

A semiconductor memory device includes a plurality of electrode layers stacked in a first direction; a semiconductor layer of a columnar shape extending through the electrode layers in the first direction; and a plurality of floating gates provided between the electrode layers and the semiconductor layer respectively. The floating gates surround the semiconductor layer. A gate length in a first direction of a floating gate positioned between one of the electrode layers and the semiconductor layer is longer than a layer thickness in the first direction of the one of the electrode layers. A ratio of the layer thickness of the one of the electrode layers to the gate length has a positive correlation with an outer diameter of a first portion of the semiconductor layer surrounded by the floating gate in a second direction from the semiconductor layer toward the one of the electrode layers.

Semiconductor memory device

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, and a charge storage film. The stacked body is provided on the substrate. The stacked body includes a plurality of first insulating films and a plurality of electrode films alternately stacked one layer by one layer. The semiconductor pillar is provided inside the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and each of the electrode films. The plurality of first insulating films include a first portion surrounding the semiconductor pillar and a second portion provided between the first portion and the semiconductor pillar, the second portion having a dielectric constant higher than a dielectric constant of the first portion.

According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers stacked in a first direction via an inter-layer insulating layer. In addition, the nonvolatile semiconductor memory device comprises: a semiconductor layer having the first direction as a longer direction; a tunnel insulating layer contacting a side surface of the semiconductor layer; a charge accumulation layer contacting a side surface of the tunnel insulating layer; and a block insulating layer contacting a portion facing the conductive layer, of a side surface of the charge accumulation layer. Moreover, the portion facing the conductive layer, of the charge accumulation layer is thinner compared to a portion facing the inter-layer insulating layer, of the charge accumulation layer.

Nonvolatile semiconductor memory device and method of manufacturing the same

According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.

Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element

A nonvolatile semiconductor memory device includes a charge storage layer on a first insulating film, a second insulating film which is provided on the charge storage layer, formed of layers, and a control gate electrode on the second insulating film. The second insulating film includes a bottom layer (A) provided just above the charge storage layer, a top layer (C) provided just below the control gate electrode, and a middle layer (B) provided between the bottom layer (A) and the top layer (C). The middle layer (B) has higher barrier height and lower dielectric constant than both the bottom layer (A) and the top layer (C). The average coordination number of the middle layer (B) is smaller than both the average coordination number of the top layer (C) and the average coordination number of the bottom layer (A).

Nonvolatile semiconductor memory device

A nonvolatile semiconductor storage device includes a plurality of electrode films stacked in a first direction; a silicon pillar piercing the stacked electrode films and separated therefrom by a block insulating film; a charge storage film provided between the block insulating film and the silicon pillar; and a tunnel insulating film provided between the charge storage film and the silicon pillar. The tunnel insulating film comprises a first insulating film having silicon oxide as a base material and containing an added element, wherein a density of the element increases from the silicon pillar toward the charge storage film.

According to one embodiment, a non-volatile memory device includes first electrodes, at least one first semiconductor layer, a first memory film, second electrodes, at least one second semiconductor layer, and a second memory film. The first electrodes are stacked in a first direction. The one first semiconductor layer extends in the first direction through the first electrodes. The first memory film is provided between each of the first electrodes and the one first semiconductor layer. The second electrodes are stacked in the first direction and provided together with the first electrodes in a second direction orthogonal to the first direction. The one second semiconductor layer extends in the first direction through the second electrodes. The second memory film is provided between each of the second electrodes and the one second semiconductor layer. An outer diameter of the first memory film is larger than that of the second memory film.

Memory device with different memory film diameters in the same laminate level

Growing community of inventors

Yokohama, Japan

Naoki Yasuda