Hitachi, Ltd.

Other

Renesas Technology Corp.

Hitachi Ulsi Systems Co., Ltd.

Hitachi Vlsi Engineering Corp.

Renesas Electronics Corporation

Hitachi Vsli Engineering Corp.

Naoki Yashiki

Takashi Ito

Kenichi Kuroda

Kiyoshi Matsubara

Shiro Baba

Kazuyoshi Shiba

Masanao Sato

Masaaki Terasawa

Hirofumi Mukai

Kenzo Funatsu

Hiroyuki Kida

Nobuo Shibasaki

Seiji Kamada

Masanobu Kawamura

Toshiyuki Tojo

Takeshi Ohkubo

Hiroyuki Matsuura

Isamu Kobayashi

Kenichi Ishibashi

Norihiko Sugita

Osamu Yamashiro

Katsumi Iwata

Chiaki Kubumura

Chiaki Kubomura

Keiji Kuboyama

Tetsuo Ishiguro

Tadashi Funakubo

Keiji Kubuyama

A second semiconductor chip including the operation of receiving operation instructions given from a first semiconductor chip and outputting a signal corresponding to it is mounted on mounting means. Internal wirings for interconnecting the first and second semiconductor chips, and external terminals respectively connected to the internal wirings are provided in the mounting means to constitute a multi chip module. Further, a signal path for selectively invalidating operation instructions from the first semiconductor chip to the second semiconductor chip is provided inside the module.

Semiconductor device and its test method

A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Method for manufacturing a printed board on which a semiconductor device having two modes is mounted

Microcomputer including a flash memory that is two-way programmable

A semiconductor device having and electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.

Method of erasing and programming a flash memory in a single-chip microcomputer having a processing unit and memory

Data line disturbance free memory block divided flash memory and microcomputer having flash memory

Data line disturbance free memory block divided flash memory and

A semiconductor integrated circuit device having a processing unit and a memory which stores data to be processed by the processing unit and which provides data to the processing unit through the data bus in response to accessing instructions from the processing unit through the address bus. The memory has a plurality of memory blocks each of which has a plurality of electrically programmable nonvolatile memory cells arranged in rows and columns in which each nonvolatile memory cell is coupled to one of a plurality of word lines and one of a plurality of data lines of the memory. The memory blocks formed can be facilitated with different memory capacities, including through controlling the number of rows or columns of memory cells associated therewith. Sources of all of the memory cells within each memory block are connected to a single source line which is fed by a predetermined voltage from a corresponding one of plural source voltage control circuits, for flash erasing the memory cells in that memory block in an erasing operation. The device also features a control register which, under the control of the processing unit, designates one or more of the memory blocks to be simultaneously erased.

Semiconductor IC device having a control register for designating memory

Growing community of inventors

Kodaira, Japan

Naoki Yashiki