Fujitsu Corporation

Naoki Sueyasu

Kuninori Ishii

Toshihiro Suzuki

Masayuki Ikeda

Haruhiko Ueno

Shigeru Nagasawa

Naoki Shinjo

Kenichi Ishizaka

Kazushige Kobayakawa

Teruo Utsumi

Masami Dewa

Moriyuki Takamura

Masayuki Kogure

Satoki Shibayama

Kaname Mita

Yasuyuki Ohno

Susumu Takatsu

Katsumi Yazawa

Upon reception of a first compilation command that contains an instruction for executing link time optimization, the apparatus generates a first object file that contains source-code information including a source code and does not contain an object code. Upon reception of a first link command that contains the instruction for executing the link time optimization, the apparatus generates the object code by executing the link time optimization and compilation on the source code information contained in the first object file, and generates a second object file that contains the generated object code. Upon reception of a second link command that does not contain an instruction for executing the link time optimization, the apparatus generates the object code by executing the compilation on the source code information contained in the first object file, and generates a third object file that contains the generated object code.

Efficient compilation for link time optimization

An information processor including a memory; and a processor coupled to the memory and method thereof. The processor is configured to store first identification information of a first source file corresponding to an object file that is not linked, judge whether second identification information of a second source file specified as a target of compilation is stored in the memory, and generate an object file through compilation on a third source file where the second identification information of the second source file is stored in the memory. The processor is also configured to perform inter-file optimization on the second source file and the third source file to generate a plurality of intermediate files and generate a plurality of object files through compilation on the plurality of generated intermediate files.

Inter-file optimization program generation method, and program generator

A computer calculates memory access rates for respective tasks on basis of hardware monitor information obtained by monitoring operating states of hardware during execution of an application program. The tasks correspond to respective syntax units specified in the application program. The computer assigns, on basis of the calculated memory access rates, a first task to a socket in a processor in response to an instruction for executing the first task.

Information processing device and method for assigning task

A method of counting an actual usage time of each CPU in a computer system using a plurality of computers for distributed processing of jobs comprising first counting a CPU usage time used for each job, then counting a processing wait time in memory access of each CPU whenever executing each job, subtracting the processing wait time of each CPU from the CPU usage time for every job, and setting the thus calculated corrected CPU usage time as the actual CPU usage time. A job control system has a means for realizing this method and uses the CPU usage time and the corrected CPU usage time obtained by this means to control the jobs and charge the users.

CPU usage time counting method and job control system using this CPU usage time

A parallel processing apparatus and method for processing data transferred between a plurality of processors each having a storage. Each of the plurality of processors corresponds a global virtual address in a global virtual memory space where a parallel processing between the plurality of processors is performed and a local virtual address in a local virtual memory space where an individual process in one of the processors is performed to an identical real address. Data is transferred from a first one of the plurality of processors to a second one of the plurality of processors by writing the data into the storage of the second processor according to the global virtual address or the local virtual address of the second processor, the second processor is notified of the global virtual address or the local virtual address of the transferred data, the notified global virtual address or the notified local virtual address is then translated into the real address which corresponds to the notified global virtual address or the notified local virtual address, data is read from the storage of the second processor to the second processor according to the translated real address, and the read data is calculated in the second processor.

Multiprocessor system and parallel processing method for processing data

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Numazu, Japan

Naoki Sueyasu