Hitachi, Ltd.

Naoki Kanda

Kiyoshi Ogata

Miwako Nakahara

Eisuke Nishitani

Tadanori Yoshida

Arito Ogawa

Takashi Nakajima

Masayuki Suzuki

Hidenori Suzuki

Masashi Sahara

Kentaro Yamada

Yoshinori Matsumuro

When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.

MOS transistor apparatus and method of manufacturing same

Bit lines BL of a DRAM that are narrowed to 0.1 &mgr;m or less are made of two-layered conductive films, in which a W (tungsten) film is deposited on a WN (tungsten nitride) film. For bit lines BL, fewer W atoms diffuse across the interface between the W film and the WN film, within crystal grains, and at grain boundaries of the W film, and no tensile stress exists in the W film. Therefore, high-temperature thermal processing in the capacitor formation process does not cause wiring breaks even when the width of the bit lines BL is narrowed to 0.1 &mgr;m or less.

Semiconductor integrated circuit device

Growing community of inventors

Sagamihara, Japan

Naoki Kanda