Denso Corporation

Harima Chemicals, Incorporated

Naoki Ito

Hideaki Ishihara

Toshihiko Matsuoka

Yoshinori Teshima

Masahiro Kamiya

Kyouichi Suzuki

Kenji Yamada

Katsutoyo Misawa

Akimasa Niwa

Yasuyuki Ishikawa

Masami Aihara

Masanori Takemoto

Takayuki Matsuda

Tatsushi Onishi

Chikara Kobayashi

Shinichiro Taguchi

Norio Fujimori

Yuuki Asada

A debug circuit of a microcomputer, providing an on-chip debug function, is provided as a measurement permission circuit for outputting a measurement permission signal to a timer that measures, as a measurement object, a time period between two events in a program execution period of the CPU, according to a user-specified condition. The measurement permission circuit includes an interrupt level register for setting an interrupt level that either permits or prohibits a time measurement operation of the timer, and a comparator for determining by comparison a high-low relationship between an interrupt level of an interrupt process executed by the CPU and an interrupt level set in the interrupt level register, and a determination result of the comparator is specified as the measurement permission signal.

Microcomputer

A microcomputer that can process plural tasks time-divisionally and in parallel, wherein one of a plural programs described by one of the tasks is described as a looped specific task in which the increment of program addresses is fixed, a program counter is usable as a timer counter, a peripheral function instruction is described in the specific task, the peripheral function instruction is set so as to indicate one or more general-purpose registers as an operand. The CPU executes the peripheral function instruction as one instruction and achieves information needed to execute the instruction by a general-purpose register and stores the execution result into the general-purpose registers. An instruction code encoding system includes an operation code and plural operands for indicating operation targets of an instruction in an instruction code and executing an instruction indicated by the operation code on the operation targets. When the operation targets indicated by the plural operands are set to a combination in which an execution result does not vary, the processing corresponding to an instruction different is executed.

Microcomputer and encoding system for executing peripheral function instructions

A microcomputer for functioning according to operation modes includes; a mode counter that counts the number of times of level change in a signal applied to a mode setting terminal; a mode decoder that decodes output data of the mode counter to output a mode signal, which represents one operation mode; a clock input terminal; a data terminal through which serial data is inputted synchronously with a serial clock signal applied to the clock input terminal; a serial-to-parallel conversion unit that converts the serial data into parallel data and stores the parallel data in an input data buffer; and a switching means that switches to a state that a CPU can access to the input data buffer in a test mode. In the test mode, test instruction data is capable of being inputted from an external circuit.

Microcomputer and functional evaluation chip

A microcomputer includes a CPU capable of performing a plurality of tasks in a parallel time-sharing operation. The tasks include at least one special task having a fixed loop program with a constant increase of an instruction address. When the CPU performs a conditional judgment instruction in the special task, the CPU prohibits reflecting an execution result of the conditional judgment instruction to both of the CPU and a periphery circuit in a case where it is no need to perform an instruction described in the special task after the conditional judgment instruction.

Processor, microcomputer and method for controlling program of microcomputer

A microcomputer includes a plurality of operation mode selecting terminals to which data for selecting plural operation modes are set. The plurality of operation mode selecting terminals is designed so as to be usable as general-purpose input terminals or output terminals. A decoder decodes the data set to the plurality of operation mode selecting terminals and outputting a mode signal for switching an internal function in accordance with a selected operation mode. A timing signal output unit outputs to the decoder a timing signal for making the decoder execute a decode operation. The timing signal output unit outputs the timing signal when at least one of power-on-reset and an externally controlled reset is varied from an active state to an inactive state.

Microcomputer with mode decoder operable upon receipt of either power-on or external reset signal

A semiconductor integrated circuit includes: a package; semiconductor chips in the package including a signal terminal; and a wiring connecting signal terminals. One semiconductor chip is a test object chip including a probe terminal and a test object terminal. The probe terminal connects to an external terminal for testing the test object terminal. The test object chip further includes: a common wiring for connecting the probe terminal and the test object terminal; a first switch for connecting/disconnecting the probe terminal and the common wiring; a second switch for connecting/disconnecting the test object terminal and the common wiring; and a test signal interrupting element for interrupting the test signal to be inputted into an input circuit of the probe terminal.

Semiconductor integrated circuit having multiple semiconductor chips with signal terminals

During software development, a multichip module is used which encloses a target chip and a development chip in one package. A CPU of the development chip fetches instructions from a flash memory in the chip to execute them, and accesses RAM and peripheral circuits in the chip. For motor control circuits that exist only in the target chip, the CPU accesses them via serial communication. When the one-chip microcomputer operates alone, its CPU switches a switching circuit to a JTAG interface side to actuate a motor control circuit via internal serial communication.

Semiconductor integrated circuit device and microcomputer development supporting device

A single-chip microcomputer includes a logic circuit, a CPU and a flip-flop for synchronizing an interrupt-request signal, which is supplied by the logic circuit to the CPU, based on a clock signal. A multi-chip emulation apparatus comprises a peripheral evaluation chip, a CPU evaluation chip and a device, which are used for emulating functions of the logic circuit, the CPU and the flip-flop respectively. When the multi-chip emulation apparatus is used for emulating functions of the single-chip microcomputer in the development, the device for emulating functions of the flip-flop synchronizes the interrupt-request signal to absorb a delay time incurred by the interrupt-request signal due to a physical distance between the peripheral evaluation chip and the CPU evaluation chip so that an interrupt-handling timing in the emulation matches an interrupt-handling timing in the real operation of the single-chip microcomputer.

Microcomputer and emulation apparatus

A non-washing soldering flux which is capable of minimizing corrosion and insulation defects due to precipitation of metal salts and cracking of the base resin is disclosed. The flux includes an activator including a dibasic acid with a molecular weight of 250 or less, and a monobasic acid with a molecular weight of from 150 to 300 and/or a dibasic acid with a molecular weight of from 300 to 600. The dibasic acid of molecular weight 250 or less in the flux exhibits sufficient activity, thus ensuring satisfactory solderability. The monobasic acid of molecular weight from 150 to 300 and the dibasic acid of molecular weight from 300 to 600 which are combined therewith promote the activity while also uniformly dispersing the metal salt of the low molecular weight dibasic acid in the flux residue, allowing it to be enveloped by the hydrophobic base resin. For greater cracking resistance, the flux includes at least an acrylic resin of molecular weight 10,000 or less and an activator.

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Nukata-gun, Japan

Naoki Ito