Kabushiki Kaisha Toshiba

Nhk Spring Co., Ltd.

Nec Corporation

Matsushita Electric Industrial Co., Ltd.

Sharp Kabushiki Kaisha Corporation

Mitsubishi Electric Corporation

Subaru Corporation

Naoki Endo

Hideo Shimizu

Takehisa Kato

Motoji Ohmori

Makoto Tatebayashi

Akihiro Kasahara

Yukihito Oowaki

Kaoru Yokota

Koji Okada

Toru Kambayashi

Hiroshi Masuda

Masao Suga

Hirofumi Muratani

Atsushi Masuda

Kazunori Ohuchi

Takuya Hasegawa

Fumihiko Sano

Yoichi Masuda

Shingo Miyazaki

Akio Okazaki

Yasuhiko Suzuki

Masatoshi Sekine

Shinya Miyaji

Nozomu Munemura

Sunao Wada

Kouya Tochikubo

Hiroshige Fujii

Hiroaki Nishi

Noriyoshi Kaneda

Taku Katoh

Kenichi Hiramatsu

Akira Toshima

Daigo Yoshii

Haruo Hinode

Morio Hirahara

Takeshi Suetsugu

Shoji Mochizuki

Koichi Noguchi

Koji Mikami

Tatsuhiro Takakusaki

Takayuki Amatsu

A headrest support structure includes: a headrest body; a bushing; and a headrest stay, the bushing comprises a support section that supports the headrest stay in the bushing, and the support section includes: a fixed portion that is abutted against an outer peripheral face of the headrest stay, and a flexing portion that is provided on an opposite side of the headrest stay from the fixed portion, and that is capable of flexing so as to be abutted against the outer peripheral face of the headrest stay when the bushing has been inserted into the retention section and the headrest stay has been inserted into the bushing.

Headrest support structure

A first device according to one embodiment includes, but is not limited to, receiver circuitry, determinator circuitry, and transmitter circuitry. The receiver circuitry is configured and/or programmed to receive from a second device, first information for controlling a third device. The determinator circuitry is configured and/or programmed to determine whether or not the first information is to be transmitted to the third device, based on whether or not the first information is associated with second information stored in the first device. The second information includes at least a first operation command for controlling a first operation of the third device. The transmitter circuitry is configured and/or programmed to, in a case that the first information is determined to be transmitted to the third device, transmit the first information to the third device.

Device, method, and system for managing device control

A space transformer includes: a ceramic substrate that contains enstatite and boron nitride as components; a through hole running through in a thickness direction with respect to a sintered body in which the boron nitride is oriented in one direction; conductive material provided inside the through hole; and a wiring pattern including a plurality of electrodes provided on each of two principal surfaces, wherein a wiring pitch in the wiring pattern on one principal surface is different from a wiring pitch in the wiring pattern on the other principal surface.

Space transformer having a ceramic substrate with a wiring pattern for use in a probe card

Each embodiment of this invention implements step-by-step and empirical authentication of devices upon digital authentication among a plurality of devices. Each of a plurality of authentication devices of each embodiment can unidirectionally generate a hash value of a low experience rank from a hash value of a high experience rank, and receives a set of high experience rank and hash value in accordance with an experience. Upon receiving a certification request of the experience rank from another authentication device, the authentication device transmits a corresponding hash value to the authentication device as a request source. Upon sending a certification request of an experience rank to another authentication device, the authentication device verifies a hash value obtained from the other authentication device on the basis of a self hash value. In this way, the authentication devices authenticate each other's experience ranks.

System of authentication, apparatus, program and method

An encryption algorithm management system has a terminal unit and a center unit that have a common cipher-key to a ciphered encryption algorithm. The terminal unit includes a transmitter configured to transmit a demand to the center unit for obtaining an encrypted data needed for decrypting the ciphered encryption algorithm when the ciphered encryption algorithm is decrypted, and an encryption controller configured to renew the common cipher-key in case of receiving the encrypted data from the center unit in response to the demand, and to produce an encryption algorithm by decrypting the encrypted data with the renewed common cipher-key. The center unit includes a key controller configured to renew the common cipher-key so as to be identical with the renewed common cipher-key in case of receiving the demand from the transmitter and an encoder configured to produce the encrypted data by encrypting a cipher-key with the renewed common cipher-key and to transmit the encrypted data to the terminal unit.

Encryption algorithm management system

The subkey data generating unithas two different subkey key generation processes. When encrypting a (T*n)plaintex block (where T denotes a predetermined cycle and n is a positive integer), sixteen sets of subkey data are generated. In all other cases, two sets of subkey data are generated. The encrypting unitencrypts the plaintex using the generated sixteen or two sets of subkey data.

Method of encryption and decryption with block number dependant key sets, each set having a different number of keys

A digital watermark embedding device has an input section which inputs pixel value data of an image which is a target for embedding of watermark information, an embedded position selection section which determines a position in frequency domain into which the watermark information is to be embedded, irrespectively of a frequency component value, a frequency component value variation decision section which determines a variation of a frequency component value at each embedded position determined by the embedded position selection section, a pixel value variation calculation section which calculates a variation of a pixel value at each point in pixel value domain of the image based on the embedded position in frequency domain determined by the embedded position selection section and on the variation of a frequency component value determined by the frequency component value variation decision section, a pixel value conversion section which embeds watermark information by changing corresponding pixel value data of the image in accordance with the variation of a pixel value at each point in pixel value domain calculated by the pixel value variation calculation section, and an output section which outputs pixel value data of the image into which watermark information has been embedded.

Digital watermark embedding device, digital watermark detection device and recording medium recording computer readable program for realizing functions of two devices

A semiconductor integrated circuit for cryptographic process according to the present invention, comprises a randomizing unit for randomizing first input data which is one of two divided parts of input data based on configuration information to identify an algorithm in randomizing process, a function F portion for receiving data which have been subjected to the randomizing process and then applying coding process to the data, and an exclusive logical sum circuit for receiving second input data which is other of two divided parts of the input data and output data from the function F portion and then outputting an exclusive logical sum of the second input data and the output data.

Semiconductor integrated circuit for cryptographic process and encryption algorithm alternating method

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Tokyo, Japan

Naoki Endo