Hamamatsu-photonics K.k.

Nao Inoue

Katsumi Shibayama

Noburo Hosokawa

Ryosuke Koike

Haruyuki Nakayama

Masatoshi Ishihara

Hirokazu Yamamoto

Daiki Suzuki

Masashi Ito

Masaharu Muramatsu

Tomofumi Suzuki

Hiroki Oyama

Yoshihiro Maruyama

Kazuto Ofuji

Yasuhito Yoneta

Kyosuke Kotani

Tatsuya Sugimoto

Shin-ichiro Takagi

Hiroo Yamamoto

Yutaka Kuramoto

Takuo Koyama

Go Tanaka

Jo Ito

Atsuya Iima

Shinichi Nakata

A light detection device includes: a back-illuminated light receiving element; a circuit element; a connection member; an underfill; and a light shielding mask. The light shielding mask includes a frame having an opening and a light shielding layer formed on an inner surface of the opening. A first opening edge on the side of the circuit element in the opening is located at the outside of an outer edge of the light receiving element. A second opening edge opposite to the circuit element in the opening is located at the inside of the outer edge of the light receiving element. The opening is narrowed from the first opening edge toward the second opening edge. A width of the frame increases from the first opening edge toward the second opening edge. The underfill reaches a gap between the light receiving element and the light shielding layer.

Light detection device

A method of manufacturing a semiconductor substrate according to an embodiment includes a first step of forming a groove having a bottom surface and a side surface on which scallops are formed by performing a process including isotropic etching on a main surface of a substrate, a second step of performing at least one of a hydrophilic treatment on the side surface of the groove and a degassing treatment on the groove, and a third step of removing the scallops formed on the side surface of the groove and planarizing the side surface by performing anisotropic wet etching in a state where the bottom surface of the recess is present.

Method for manufacturing semiconductor substrate, method for manufacturing damascene wiring structure, semiconductor substrate, and damascene wiring structure

The damascene wiring structure includes a base including a main surface provided with a groove, an insulating layer including a first portion provided on an inner surface of the groove and a second portion provided on the main surface, a metal layer provided on the first portion, a wiring portion embedded in the groove, and a cap layer provided to cover the second portion, an end portion of the metal layer, and the wiring portion. A surface of a boundary part between the first portion and the second portion includes an inclined surface inclined with respect to a direction perpendicular to the main surface. The end portion of the metal layer enters between the cap layer and the inclined surface, and in the end portion, a first surface along the cap layer and a second surface along the inclined surface form an acute angle.

Damascene interconnect structure, actuator device, and method of manufacturing damascene interconnect structure

A light module includes an optical element and a base on which the optical element is mounted. The optical element has an optical portion which has an optical surface; an elastic portion which is provided around the optical portion such that an annular region is formed; and a pair of support portions which is provided such that the optical portion is sandwiched in a first direction along the optical surface and in which an elastic force is applied and a distance therebetween is able to be changed in accordance with elastic deformation of the elastic portion. The base has a main surface, and a mounting region in which an opening communicating with the main surface is provided. The support portions are inserted into the opening in a state where an elastic force of the elastic portion is applied.

Light module

A semiconductor device includes a support body including a mount region, a semiconductor chip disposed on the mount region with a predetermined distance therebetween, a bump disposed between the support body and the semiconductor chip, a wall portion disposed between the support body and the semiconductor chip along a part of an outer edge of the semiconductor chip, and an underfill resin layer disposed between the support body and the semiconductor chip. The underfill resin layer covers an outer side surface of the wall portion.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate in which a through hole is formed, a first wiring, an insulating layer, and a second wiring that is electrically connected to the first wiring in an opening of the insulating layer. The insulating layer has a first curved portion that covers an inner surface of a through hole between a first opening and a second opening and a second curved portion that covers an edge of the second opening. A surface in the first curved portion is curved in a convex shape toward the side opposite the inner surface of the through hole. The surface in the second curved portion is curved in a convex shape toward the side opposite the inner surface of the through hole.

Semiconductor device

A method of manufacturing a semiconductor device includes a first process in which a first wiringis provided on a first surfacea of a semiconductor substrate; a second process in which a light transmitting substrateis attached to the first surfacea; a third process in which the semiconductor substrateis thinned so that the thickness of the semiconductor substrateis smaller than the thickness of the light transmitting substrate; a fourth process in which a through holeis formed in the semiconductor substrate; a fifth process in which a dip coating method is performed using a first resin material and thus a resin insulating layeris provided; a sixth process in which a contact holeis formed in the resin insulating layer; and a seventh process in which a second wiringis provided on a surfaceb of the resin insulating layer, and the first wiringand the second wiringare electrically connected via a contact hole

Semiconductor device manufacturing method

A semiconductor device includes a semiconductor substrate in which a through hole is formed, a first wiring that is provided on a first surface of the semiconductor substrate, an insulating layer provided on an inner surface of the through hole and a second surface of the semiconductor substrate, and a second wiring that is provided on a surface of the insulating layer and electrically connected to the first wiring in an opening. The surface of the insulating layer includes a first region, a second region, a third region, a fourth region that is curved to continuously connect the first and the second regions, and a fifth region that is curved to continuously connect the second and the third regions. An average inclination angle of the second region is smaller than that of the first region and is smaller than that of the inner surface.

Semiconductor device and manufacturing method thereof

A method includes a first process in which a first wiring is provided on a surface of a semiconductor substrate; a second process in which a light transmitting substrate is attached to the surface; a third process in which the semiconductor substrate is thinned so that the thickness of the semiconductor substrate is smaller than the thickness of the light transmitting substrate; a fourth process in which a through hole is formed in the semiconductor substrate; a fifth process in which a dip coating method is performed using a resin material and thus a resin insulating layer is provided; a sixth process in which a contact hole is formed in the resin insulating layer; and a seventh process in which a second wiring is provided on a surface of the resin insulating layer, and the first wiring and the second wiring are electrically connected via a contact hole.

An SERS element includes a substrate, a fine structure portion formed on a surface of the substrate and having a plurality of pillars, and a conductor layer formed on the fine structure portion and constituting an optical functional portion that causes surface-enhanced Raman scattering. A groove is provided in an outer surface of each pillar. A plurality of gaps are formed in the conductor layer by forming the conductor layer on the outer surface of each pillar in a state in which at least a portion of an inner surface of the groove is exposed.

Surface-enhanced raman scattering element and method for manufacturing same

A first semiconductor substrateand a second semiconductor substrateare different in material, and therefore have sensitivities to incident light of mutually different wavelength bands. Respective photodiodes of photodiode arrays are connected to amplifiers of the first semiconductor substrate. According to this method, the second semiconductor substrateis separated from the wafer by etching the second semiconductor substrateand then dicing a deepest portion of the etched groove. The density of crystal defects in a side surface produced by etching is smaller than the density of crystal defects in a side surface produced by dicing. Because a photodiode located in an end portion of the second semiconductor substratedoes not need to be removed, a reduction in the number of photodiodes can be suppressed.

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Hamamatsu, Japan

Nao Inoue