Bae Systems Information and Electronic Systems Integration Inc.

Nandor G Thoma

Kenneth R Knowles

Scott Doyle

A dual path ring oscillator core includes three dual path inverters, each having a first inverter and a second inverter. Within the first inverter, one transistor is coupled to a first output of a previous dual path inverter, while another transistor is coupled to a second output of the previous dual path inverter. Within the second inverter, one transistor is coupled to the second output of the previous dual path inverter, while another transistor is coupled to the previous dual path inverter's first output. A first and a final dual path inverter are analogously coupled. A transient pulse will not propagate through successive dual path inverter stages. A dual to single path converter is coupled to receive signals output by the final dual path inverter. If a transient signal appears at a dual to single path converter input, stray output node capacitance maintains a correct output signal value.

Ring oscillator providing single event transient immunity

A single-event upset tolerant sense latch circuit for sense amplifiers is disclosed. The single-event upset tolerant sense latch circuit includes a first set of isolation transistors, a second set of isolation transistors, a first set of dual-path inverters, a second set of dual-path inverters, and an isolation transistor. The first set of isolation transistors is coupled to a first bitline, and the second set of isolation transistors is coupled to a second bitline. The second bitline is complementary to the first bitline. The first set of dual-path inverters is coupled to the first set of isolation transistors, and the first set of dual-path inverters includes a first transistor connected to a second transistor in series along with a third transistor connected to a fourth transistor in series. The second set of dual-path inverters is coupled to the second set of isolation transistors, and the second set of dual-path inverters includes a fifth transistor connected to a sixth transistor in series along with a seventh transistor connected to an eighth transistor in series. The isolation transistor couples the first and second sets of dual-path inverters to ground.

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Manassas, VA, United States of America

Nandor G Thoma