Sandisk Technologies Inc.

Applied Materials, Inc.

Western Digital Technologies, Inc.

Intermolecular, Inc.

Kabushiki Kaisha Toshiba

Sandisk 3d LLC

Nan Lu

Mei Yin Chang

Deepanshu Dutta

Dengtao Zhao

Niles Yang

Peng Zhang

David T Or

Takeshi Yamaguchi

Imran Hashim

Tim Minvielle

Ryan C Clarke

Matt Cheng-Hsiung Tsai

Martin Deehan

Yingda Dong

Nian Niles Yang

Ching-Huang Lu

Xinliang Lu

Chien-Teh Kao

Liang Pang

Hong-Yan Chen

Grishma Shah

Sahil Sharma

Ashish Kumar Baraskar

Zhenbin Ge

Philip David Reusswig

Chien-Lan Hsueh

Haichun Yang

Chao-Han Cheng

Piyush Dhotre

Zelei Guo

Tienchien Kuo

A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Storage system and method for performing a targeted read scrub operation during intensive host reads

A data storage device including, in one implementation, a non-volatile memory and a controller. The non-volatile memory includes a memory block. The memory block includes a plurality of word lines that are written sequentially from a first end of the memory block to a second end of the memory block. The controller is coupled to the non-volatile memory. The controller is configured to determine a last written word line of the memory block. The controller is also configured to set a non-selected word line voltage based on the last written word line of the memory block. The controller is further configured to apply the non-selected word line voltage to non-selected word lines of the memory block.

Power reduction during open and erased block reads of memory based on the position of last written word line of a memory block

Program disturb is a condition that includes the unintended programming of a memory cell while performing a programming process for other memory cells. Such unintended programming can cause an error in the data being stored. In some cases, program disturb can result from electrons trapped in the channel being accelerated from one side of a selected word line to another side of the selected word line and redirected into the selected word line. To prevent such program disturb, it is proposed to open the channel from one side of a selected word line to the other side of the selected word line after a sensing operation for program verify and prior to a subsequent programming voltage being applied.

Non-volatile memory with countermeasure for program disturb including purge during precharge

Systems, methods, and/or devices are used to manage open blocks within non-volatile storage devices, in order to improve the reliability of non-volatile storage devices. In some embodiments, when a shut-down request is received from a host device, the storage device fetches information about open blocks and their boundary regions susceptible to data reliability issues, and for each identified boundary region, the storage device programs a region contiguous to the identified boundary region. In some embodiments, the device updates an XOR parity table used for XOR parity management with the information that the region contiguous to the identified boundary is programmed. Subsequently, in some embodiments, the storage device can use the information, stored in the contiguous region and/or the XOR parity table, for data recovery in the event of a data loss. As a result, the reliability of the non-volatile storage device is improved.

Method and system for improving open block data reliability

Non-volatile memory with countermeasure for program disturb including spike during boosting

A memory device and associated techniques to reduce charge loss of memory cells. In one aspect, a charge loss countermeasure is performed if a word line selected for programming is adjacent to a dummy word line. The countermeasure can involve programming the dummy memory cells through injection disturb. In one approach, the timing is adjusted for the voltages on the selected word line and the dummy word line at the end of a program voltage. The selected word line voltage can be decreased more quickly, or the dummy word line voltage can be decreased more slowly. The decrease of the dummy word line voltage can also be delayed. Another approach involves elevating the bit line voltage during the decrease of the selected word line voltage. The bit line voltage can be a function of the assigned data state of a selected cell.

Reducing charge loss in data memory cell adjacent to dummy memory cell

A storage system and method for temperature throttling for block reading are provided. In one embodiment, a storage system is provided comprising a memory comprising a plurality of word lines and a controller in communication with the memory. The controller is configured to determine whether a temperature of the memory is above a first threshold temperature; and in response to determining that the temperature of the memory is above the first threshold temperature: apply a voltage to the plurality of word lines; and after the voltage has been applied, read one of the plurality of word lines. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Storage system and method for temperature throttling for block reading

Embodiments of the present invention generally include an apparatus for plasma cleaning and a method for plasma cleaning. The apparatus can include a lid body having a first surface for facing a pedestal during cleaning and a second surface opposite the first surface and substantially parallel to the first surface, the second surface having a first indentation sized to receive a magnet assembly, one or more handles coupled to the second surface of the lid body, and the magnet assembly resting in the first indentation. The method can include removing a sputtering target from the processing chamber, sealing the processing chamber, introducing a gas into the processing chamber, applying an RF bias to a pedestal within the processing chamber, maintaining the pedestal at a substantially constant temperature, and removing material from the pedestal to clean the pedestal.

Plasma cleaning apparatus and method

Provided are resistive random access memory (ReRAM) cells, each having three or more resistive states and being capable of storing multiple bits of data, as well as methods of fabricating and operating such ReRAM cells. Such ReRAM cells or, more specifically, their resistive switching layer have wide range of resistive states and are capable of being very conductive (e.g., about 1 kOhm) in one state and very resistive (e.g., about 1 MOhm) in another state. In some embodiments, a resistance ratio between resistive states may be between 10 and 1,000 even up to 10,000. The resistive switching layers also allow establishing stable and distinct intermediate resistive states that may be assigned different data values. These layers may be configured to switching between their resistive states using fewer programming pulses than conventional systems by using specific materials, switching pluses, and resistive state threshold.

Resistive random access memory cell having three or more resistive states

A single TiON film is used to form a ReRAM device by varying the oxygen and nitrogen content throughout the device to form the electrodes and switching layer. A ReRAM device that can be formed in a single deposition chamber is also disclosed. The ReRAM device can be formed by forming a first titanium nitride layer, forming a titanium oxynitride-titanium oxide-titanium oxynitride layer, and then forming a second titanium nitride.

Using TiON as electrodes and switching layers in ReRAM devices

Methods for etching dielectric layers comprising silicon and nitrogen are provided herein. In some embodiments, such methods may include providing a substrate having a dielectric layer comprising silicon and nitrogen disposed thereon, forming reactive species from a process gas comprising hydrogen (H) and nitrogen trifluoride (NF) using a remote plasma; and etching the dielectric layer using the reactive species. In some embodiments, an oxide layer is disposed adjacent to the dielectric layer. In some embodiments, the flow rate ratio of the process gas can be adjusted such that an etch selectivity of the dielectric layer to at least one of the oxide layer or the substrate is between about 0.8 to about 4.

Selective etching of silicon nitride

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Nan Lu