Qualcomm Incorporated

Nan Chen

Zhiqin Chen

Junmou Zhang

Ritu Chaba

Chang Ho Jung

Chuang Zhang

Sei Seung Yoon

Changho Jung

Hari Rao

Cheng Zhong

Zhengming Fu

Alan G Lewis

Yu Song

Gregory Bullard

Michael Thomas Fertsch

Min Chen

Seong-Ook Jung

Zhongze Wang

Mohamed Hassan Abu-Rahma

Mehdi Hamidi Sani

Guoan Zhong

Shih-Hsin Jason Hu

Mark Todorovich

Mohamed Waleed Allam

Laura Fuentes

Adam Polak

Yong Xu

Nam Dang

David Ian West

Boris Andreev

Chang Ki Kwon

Jan Christian Diffenderfer

Yuancheng Christopher Pan

Mohammad Reza Kakoee

Sorin Adrian Dobre

Navid Toosizadeh

Paul Lawrence Viani

Li Pan

Percy Tehmul Marfatia

Narasimhan Vasudevan

Rajagopal Narayanan

Jasmin Smaila Ibrahimovic

Yuan-cheng Christopher Pan

Taesik Na

Zeeshan Shafaq Syed

Varun Verma

Lingyun Wang

Sian-Yee Sean Lee

Mohamed H Abu Rahma

Thuan Ly

Carlos Auyon

Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.

Detection of laser-based security attacks

An apparatus and a method to adjust a source voltage based on an operating voltage response are provided. The apparatus includes a circuit configured to change state from a first state to a second state comprising receiving an operating voltage from a power source through a power distribution network. The apparatus further includes a sensor configured to measure an operating voltage response to the circuit changing state to receiving the operating voltage. The apparatus further includes a control circuit configured to adjust a source voltage at the power source based on the operating voltage response measured by the sensor. The method includes changing a state to receiving an operating voltage from a power source through a power distribution network, measuring an operating voltage response to the changing state to receiving the operating voltage, and adjusting the source voltage at the power source based on the measured operating voltage response.

Adjusting source voltage based on operating voltage response

An apparatus for sensing distributed load currents provided by power gating circuit. The apparatus includes a power gating circuit including a set of bulk transistors coupled in series with a set of circuits between first and second voltage rails. The apparatus includes a current sensor with a first ring oscillator, a first frequency-to-code (FTC) converter, a second ring oscillator, a second FTC converter, and a subtractor. The first ring oscillator includes a first set of one or more inverters configured to receive a first voltage at a node between the power gating circuit and the first circuit, and a second set of one or more inverters configured to receive a second voltage at a second node between the power gating circuit and the second circuit. The first ring oscillator is configured to generate a signal including a frequency related to the voltage drops across the first and second sets of transistors.

Apparatus and method for sensing distributed load currents provided by power gating circuit

A sense amplifier and method thereof are provided. The sense amplifier includes first and second transistors coupled to first and second bit lines, respectively. The first and second transistors are configured to connect the first and second bit lines to a differential amplifier during a first state (e.g., when a differential voltage is present on the first and second bit lines and prior to a sense signal transition) and to isolate the first and second bit lines from the differential amplifier during a second state (e.g., after the sense signal transition). The sense amplifier further includes a third transistor configured to deactivate the differential amplifier during the first state and configured to activate the differential amplifier during the second state.

Dual sensing current latched sense amplifier

Memory devices and methods of reducing leakage current therein are disclosed. The memory device includes a memory core array including a plurality of bitlines, and peripheral logic configured to interface with the memory core array. The memory device further includes a footswitch configured to isolate the peripheral logic from a ground voltage, and a headswitch configured to isolate a precharge current path from the plurality of bit lines of the memory core array. Leakage current within the memory device may be reduced via the isolation provided by the footswitch and the headswitch.

Reducing leakage current in a memory device

In one embodiment, a method for measuring current comprises generating a sensor current based on a current being measured. The method also comprises converting a combined current into a first frequency, wherein the combined current is a sum of the sensor current and a common-mode current, and converting the first frequency into a first count value. The method further comprises converting the common-mode current into a second frequency, converting the second frequency into a second count value, and subtracting the second count value from the first count value to obtain a current reading.

Low power small area oscillator-based ADC

An apparatus includes a memory, a timing circuit configured to emulate a first operation of the memory to activate a second operation of the memory, a sensor configured to emulate a portion of the timing circuit, and a controller configured to adjust an operating parameter of the memory based on the sensor emulating the portion of the timing circuit. A method is presented. The method includes at least operating a timing circuit to emulate a first operation of the memory, activating a second operation of the memory based on the emulating the first operation of the memory, emulating, by a sensor, a portion of the timing circuit. Another apparatus is presented. The apparatus includes at least a memory, a timing circuit, and means for tracking a performance of the memory based on the timing circuit tracking a memory operation.

Within-die special oscillator for tracking SRAM memory performance with global process variation, voltage and temperature

Systems and methods for sensing temperature on a chip are described herein. In one embodiment, a temperature sensor comprises a first transistor having a gate, a second transistor having a gate coupled to the gate of the first transistor, and a bias circuit configured to bias the gates of the first and second transistors such that the first and second transistors operate in a sub-threshold region, and to generate a current proportional to a difference between a gate-to-source voltage of the first transistor and a gate-to-source voltage of the second transistor. The temperature sensor also comprises an analog-to-digital converter (ADC) configured to convert the current into a digital temperature reading.

Low power low cost temperature sensor

In one embodiment, a method for measuring current is described herein. The method comprises shorting first and second inputs of an amplifying circuit to generate a first output signal, and converting the first output signal into an offset cancelation value. The method also comprises passing a current through a power switch, wherein the current generates a voltage drop across the power switch, applying the voltage drop across the first and second inputs of the amplifying circuit to generate a second output signal, and converting the second output signal into a current value. The method further comprises subtracting the offset cancelation value from the current value to generate an offset-compensated current value.

High-current sensing scheme using drain-source voltage

A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may be used for detecting an incorrect clock frequency. In one example, the apparatus includes a first circuit configured to compare a clock signal period to a delay period. Additionally, in one example, the apparatus includes a second circuit configured to output a first signal. The period of the first signal may be double the clock signal period when the clock signal period is greater than the delay period. The apparatus may, in one example, also include a third circuit configured to output a second signal. The period of the second signal may be greater than double the clock signal period when the clock signal period is greater than the delay period.

Frequency sensor for side-channel attack

One feature pertains to a true random number generator that utilizes the settling time of a bit cell as an entropy source to generate random digital output values. The bit cell may be a static random access memory bit cell. The bit cell's settling time may be converted into a digital output using an analog to digital converter. A plurality of bit cells may serially couple to one another in a ring formation. The bit cell ring can then be enabled such that each bit cell of the plurality of bit cells achieves a settling value that activates the subsequent bit cell in the ring causing it to in turn reach a settling value, and so on. An output node of one of the bit cells in the ring can then be sampled using a flip-flop to generate a continuous stream of random bits.

Methods and apparatuses for generating random numbers based on bit cell settling time

Systems and methods for sensing voltage on a chip are described herein. In one embodiment, a voltage sensor comprises a voltage-controlled oscillator coupled to a voltage being sensed, and a plurality of transition detectors, wherein each of the transition detectors is coupled to a different location on the oscillator, and wherein each of the transition detectors is configured to count a number of transitions at the respective location over a time period. The voltage sensor also comprises an adder configured to add the numbers of transitions from the transition detectors to generate an output value that is approximately proportional to the voltage.

Low power high resolution oscillator based voltage sensor

An integrated circuit compensates for circuit aging by measuring the aging with an aging sensor and controlling a supply voltage based on the measured aging. The operating environment for the aging sensor can be set to reduce impacts of non-aging effects on the measured aging. For example, the operating environment can use a temperature inversion voltage. An initial aging measurement value which is the difference between an initial aged measurement and an initial unaged measurement can be stored on the integrated circuit. A core power reduction controller can use the measured aging and the stored initial aging measurement value to update a performance-sensor target value and then perform adaptive voltage scaling using the using the updated performance-sensor target value.

Integrated circuit adaptive voltage scaling with de-aging

A signal generator configured to generate an oscillating signal with a temperature-compensated frequency. The signal generator includes a ring oscillator, and a complementary to absolute temperature (CTAT) current generator configured to generate a CTAT current for the ring oscillator to temperature-compensate the frequency of the oscillating signal.

Temperature-compensated signal generator for supply voltage monitoring

Growing community of inventors

San Diego, CA, United States of America

Nan Chen