Cadence Design Systems, Inc.

Namrata M Sadhankar

Manish Garg

Sourav Kumar Sircar

Akash Khandelwal

Marc Heyberger

Lalit Bharat

Manish Bhatia

Ruchir Agarwal

Renuka Deshpande

Anurag Saran

Chunlong Pan

Disclosed are methods, systems, and articles of manufacture for implementing an electronic design with high-capacity design closure. A reduced netlist may be generated for an analysis view of an electronic design based at least in part upon logic of interest in the analysis view. A closure may be performed based at least in part upon a union netlist, wherein the union netlist is generated from the reduced netlist. The electronic design may then be implemented based at least in part upon a result of the closure task.

Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure

Growing community of inventors

Noida, India

Namrata M Sadhankar