Samsung Electronics Co., Ltd.

Nam-Yoon Woo

Jin-kyu Kim

Song-Ho Yoon

Kyung-Min Park

Ji-Hyun In

Sun-Mi Yoo

Dong-Jun Shin

Hyo-Jun Kim

Jeong-eun Kim

Jae-hyuck Yoo

An input/output control method and apparatus optimized for a flash memory, which can improve the performance of the flash memory. The input/output control method optimized for a flash memory includes determining whether a random write operation of data occurs in a flash memory, and successively writing randomly input data in a predetermined surplus region of the flash memory if it is judged that the random write operation occurs.

Input/output control method and apparatus optimized for flash memory

An apparatus for processing data of a non-volatile memory includes a non-volatile memory having a plurality of blocks, an operation processing unit which, when a write operation is requested from a user, writes data in the plurality of blocks, and a block managing unit which collectively converts the plurality of blocks, where the data is written, to a plurality of data blocks and manages statuses of the plurality of blocks to correspond to an operation process performed by the operation processing unit.

Apparatus and method of processing data of non-volatile memory using transaction block

A nonvolatile-memory-management includes a generation unit that generates a free block list by arranging an entry including representative information of a group, of which free blocks adjacent to each other are grouped according to predetermined criteria, according to key values where the representative information are combined, a determination unit that determines parameters according to characteristics of data to be recorded, and a block-allocating unit that allocates free blocks satisfying the parameters as an area to be recorded with the data by referring to the free block list.

Apparatus and method for managing nonvolatile memory

An apparatus includes a nonvolatile memory including a plurality of memory cells, each configured to store data having at least two bits and a control circuit configured to write data to a first memory cell connected to a wordline of the nonvolatile memory and to then write data to a second memory cell that is connected to wordline and shares a bit buffer with the first memory cell.

Multi-level cell memory devices and methods using sequential writing of pages to cells sharing bit buffers

Provided are a nonvolatile memory and an apparatus and method for deciding data validity for the same, in which validity of data stored in the nonvolatile memory can be decided. The nonvolatile memory includes a memory cell storing data bits in a plurality of pages included in a predetermined block through a plurality of states realized by at least two bits. The block includes a first page in which data bits for determining validity of data bits written by a user are stored, and a second page in which the data bits written by the user are stored.

Nonvolatile memory and apparatus and method for deciding data validity for the same

A nonvolatile memory including a memory cell that stores data in a plurality of pages included in a block according to a voltage applied to a memory cell is provided. The nonvolatile memory includes a block that includes a first page including first data that stores data recorded by a user, and a second page including second data area that stores data recorded by a user, wherein the second page records count-information on states represented by a bit pair in the same position of the first data area and the second data area.

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Suwon-si, South Korea

Nam-Yoon Woo