Hynix Semiconductor Inc.

Nam-Kyeong Kim

Seung-Jin Yeom

Soon-Yong Kweon

Won Sic Woo

Woo-Seok Yang

Eun-Seok Choi

Jae Chul Om

A nonvolatile memory device includes a plurality of memory blocks and a high voltage application unit configured to apply a high voltage to a word line of a memory block unselected from among the plurality of memory blocks and float the word line, during the erase operation.

Nonvolatile memory device and method for operating the same

A nonvolatile memory device includes a plurality of memory blocks, a plurality of erasure detection units provided at the plurality of memory blocks, respectively, and configured to each detect erasure of the respective memory blocks, and a control unit configured to determine that a memory block is a bad memory block when a number of erasure operations performed on the memory block as detected by the respective erasure detection unit is greater than a reference value.

A method for fabricating a NAND type flash memory device includes defining a select transistor region and a memory cell region in a semiconductor substrate, forming a tunnel insulating layer, a floating gate conductive layer, and a dielectric layer over a semiconductor substrate, etching the dielectric layer, thereby forming an opening exposing the floating gate conductive layer, forming a low resistance layer in the opening, forming a control gate conductive layer over the semiconductor substrate, and etching the control gate conductive layer, the dielectric layer, the floating gate conductive layer, and the tunnel insulating layer to form gate stacks of memory cells and source/drain select transistors.

Method for forming NAND typed memory device

A method for performing a copy-back operation in a non-volatile memory device includes: measuring and recording a maximum program voltage used to program a part of target data to copy-back when a copy-back command is inputted; and performing a copy-back operation using the recorded maximum program voltage.

Non-volatile memory device and method for copy-back thereof

Nand type non-volatile memory device and method for fabricating the same

Non-volatile memory devices and a method of manufacturing the same, wherein data storage of two bits per cell is enabled and the devices can pass the limit in terms of layout, whereby channel length can be controlled. The non-volatile memory device includes gate lines formed in one direction on a semiconductor substrate in which trenches are formed, wherein the gate lines gap-fill the trenches, a dielectric layer formed between the semiconductor substrate and the gate lines, bit separation insulating layers formed between the semiconductor substrate and the dielectric layer under the trenches, and isolation structures formed by etching the trenches, and the dielectric layer and the semiconductor substrate between the trenches in a line form vertical to the gate lines and gap-filling an insulating layer.

Method of manufacturing non-volatile memory device

The present invention provides a ferroelectric memory device capable of suppressing a defect generation due to a charge impact and a method for fabricating the same. The ferroelectric memory device includes: a semiconductor substrate on which a transistor is formed; a semiconductor substrate structure having a transistor; a lower electrode formed on an interfacial insulation layer and connected to a source/drain region of the transistor; an isolating insulation layer on the interfacial insulation layer; a ferroelectric layer covering the isolating insulation layer and lower electrode; an oxygen vacancy compensation layer being formed on the ferroelectric layer and compensating an oxygen vacancy caused by deoxidization of a composition of the ferroelectric layer; and an upper electrode formed on the oxygen vacancy compensation layer.

Capacitor and method for fabricating ferroelectric memory device with the same

The present invention is related to a method for fabricating a ferroelectric memory device effectively preventing a deformation and lift of a lower electrode caused by a different thermal expansion rate between the lower electrode and a inter layer dielectric film at a succeeding heat treatment process. The method for fabricating a ferroelectric memory device includes: forming a lower electrode on a predetermined surface of a semiconductor substrate; forming a metal oxide layer over a surface of the lower electrode and a surface of the semiconductor substrate; forming an inter layer dielectric film over the metal oxide layer; performing a blanket etching for the inter layer dielectric film and the metal oxide layer; and forming an opening having a predetermined depth.

Method of manufacturing ferroelectric memory device

A ferroelectric memory device and a method for manufacturing the same is disclosed. Because a (Bi La )Ti O (BLT) layer, which can be crystallized in relatively low temperature, is used in a capacitor, the electrical characteristics of the ferroelectric capacitor can be improved. The method for manufacturing ferroelectric memory device includes the steps of forming a first conductive layer for a bottom electrode on a semiconductor substrate, forming the (Bi La )Ti O ferroelectric layer, wherein 'x' representing atomic concentration of Bi ranges from about 3.25 to about 3.35 and 'y' representing atomic concentration of La ranges from about 0.70 to about 0.90 and forming a second conductive layer for a top electrode on the (Bi La )Ti O ferroelectric layer.

FeRAM having BLT ferroelectric layer and method for forming the same

A semiconductor fabrication technique for forming a ferroelectric capacitor, in which the thermal burden is reduced by using an SBT-based ferroelectric thin film such as Sr Bi Ta O ('SBT') or Sr Bi (Ta Nb ) O ('SBT(N)') as the dielectric medium. The method includes the following steps. A strontium-bismuth-tantalum oxide film is formed on a semiconductor substrate, with a conductive film for a lower electrode having been formed on the semiconductor substrate (first step). An NH gas is flowed at a stabilizing step of a rapid thermal annealing so as to reduce organic materials bonded with metal elements of the strontium-bismuth-tantalum oxide film (second step). An oxide gas is flowed at a temperature of 450&tilde;650&deg; C. at an annealing step of the rapid thermal annealing so as to induce a perovskite nuclear formation in the strontium-bismuth-tantalum oxide film (third step). A furnace annealing is then carried out so as to induce a grain growth in the strontium-bismuth-tantalum oxide film (fourth step).

Growing community of inventors

Gyeonggi-do, South Korea

Nam-Kyeong Kim