Taiwan Semiconductor Manufacturing Comp. Ltd.

Nai-Hao Yang

Kuan-Chia Chen

Hung-Wen Su

Chun-Sheng Chen

Huei-Wen Hsieh

Yu-Cheng Hsiao

Chun-Hsu Yang

Che-Wei Tien

Interconnect structures and methods and apparatuses for forming the same are disclosed. In an embodiment, a method includes supplying a process gas to a process chamber; igniting the process gas into a plasma in the process chamber; reducing a pressure of the process chamber to less than 0.3 mTorr; and after reducing the pressure of the process chamber, depositing a conductive layer on a substrate in the process chamber.

Interconnect structures and methods and apparatuses for forming the same

The present disclosure provides methods for forming a conductive fill material (e.g., a conductive feature) by a physical vapor deposition (PVD) process. In one embodiment, a method of forming a conductive fill material on a substrate includes maintaining a first substrate temperature at a first range for a first period of time while forming a pre-layer of a conductive fill material on a substrate, providing a thermal energy to the substrate to maintain the substrate at a second substrate temperature at a second range for a second period of time, wherein the second substrate temperature is higher than the first substrate temperature, and continuously providing the thermal energy to the substrate to maintain the substrate a third substrate temperature at a third range for a third period of time to form a bulk layer of the conductive fill material on the substrate.

Physical vapor deposition process for semiconductor interconnection structures

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Keelung, Taiwan

Nai-Hao Yang