Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Nagisa Sasaki

Kimio Ueda

Hisayasu Satoh

An integrated circuit aims to decrease a parasitic resistance between an input protection circuit cell and a power supply cell including a clamp circuit, restrain a size of a diode from increasing beyond ESD robustness of the diode itself in order to compensate for a decrease in the ESD robustness, and prevent high-frequency signal power from decreasing due to a large capacitance component from a diode in an input protection circuit and a parasitic resistance component from a series resistor. The input protection circuit cell includes: an input terminal coupled to a signal pin; an output terminal coupled to not only a high-frequency circuit but also the input terminal and a node; a diode that is provided between the node and VDD and makes an electric current flow from the node to VDD; another diode that is provided between the node and GND and makes an electric current flow from GND to the node; and a clamp circuit coupled between VDD and GND parallel to the diodes.

Integrated circuit

A semiconductor integrated circuit comprises a phase control unit for shifting the phase of an input signal by two or more different fixed phases so as to generate two or more output signals out of phase. A phase detector detects phase differences among the two or more output signals from the phase control unit, and generates one or more correction signals each having a value corresponding to a deviation of one of the detected phase differences from a desired phase difference. The phase detector feeds the one or more correction signals back to the phase control unit so as to make the detected phase differences equal to desired phase differences, respectively. Preferably, the phase control unit can include first and second phase shifters each for shifting the phase of the input signal by a fixed phase, a variable capacitor for capacity adjustment connected in parallel to the first phase shifter and having a control terminal, a first amplifier connected to the first phase shifter, and a second amplifier connected to the second phase shifter. In this case, amplifiers included in the phase control unit are only the first and second amplifiers which are front-end amplifiers. Accordingly, the chip area can be reduced, and the amount of current flowing in the semiconductor integrated circuit can be reduced.

Semiconductor integrated circuit which generates waveforms which are out of phase with each other

First emitters of a pair of input multi-emitter transistors are connected to a current source in common, to form an input differential amplifier. The other emitters of the input multi-emitter transistors are connected to current sources respectively. Pull-up and pull-down transistors are provided for respective ones of a pair of output terminals. Bases of the pull-up transistors are supplied with collector voltages of the input multi-emitter transistors, while those of the pull-down transistors are supplied with voltages of the other emitters of the multi-emitter transistors. Provided is an emitter-coupled logic circuit which has excellent load drivability, operates stably and obtains complementary outputs at a low cost.

Current switching logic type circuit with small current consumption

An emitter-coupled logic circuit having superior drivability, stable operation, and obtaining complementary outputs. A pair of input differential transistors have their emitters coupled to a first current source in common, their bases connected to receive respective input signals, and outputting complementary logic values corresponding to the respective input signals. Pull-up and pull-down transistors are provided for respective ones of a pair of output terminals. Bases of the pull-up transistors are supplied with collector voltages of the input transistors and their emitters are connected to the respective output terminals. The bases of the pull-down transistors are supplied with the respective input signals, their emitters are coupled to a second current source in common, and their collectors are connected to the respective output terminals. A stabilizing circuit is connected to the respective output terminals to maintain the pull-up transistors in conducting states.

Growing community of inventors

Tokyo, Japan

Nagisa Sasaki