Lucent Technologies Inc.

At&t Bell Laboratories

Alcatel-lucent USA Inc.

Alcatel Lucent

Nokia of America Corporation

Other

At+t Corp.

Nokia Solutions and Networks Oy

Agere Systems Guardian Corp.

At&t Laboratories, Limited

Nagesh R Basavanhally

Omar Daniel Lopez

Vladimir Anatolyevich Aksyuk

Richard Borutta

James Albert Walker

John David Weld

Avinoam Kornblit

Yee Leng Low

Raymond A Cirelli

Hong Tang

Joseph Ashley Taylor

Paul Robert Kolodner

Dan Mark Marom

Chien-Shing Pai

David Andrew Ramsey

Girard Sidone

Robert Francis Fullowan

Warren Yiu-Cho Lai

Edward W Jekkal

Ronald Alex Nordin

Charles H Joyner

Young-Kai Chen

Theodore Sizer

Thomas Nikita Krupenkin

David T Neilson

Alan Michael Lyons

Noriaki Kaneda

Cristian A Bolle

George J Shevchuk

Uziel Koren

Brijesh Vyas

Mark Anthony Paczkowski

Todd Richard Salamon

Mark P Earnshaw

Anthony F Levi

Ronald Edward Scotti

Michael F Brady

Yves Baeyens

Rene R Ruel

Walter J Picot

Wonsuck Lee

Shahriar Shahramian

Gerard Edmond Henein

Marc Hodes

Kenneth H Billingham

Charles Joseph Buondelmonte

D Bruce Buchholz

Benjamin H Cranston

Scott Allen Bergman

Theodore Sizer, Ii

George Michael Wenger

Iris A Artaki

Marsha M Regn

An optoelectronic circuit having a substantially planar double-sided substrate, each side of which has a respective plurality of electrically conducting tracks and a respective plurality of planar optical waveguides. The substrate also has at least one via crossing the substrate in a manner that can be used to establish an optical path across the substrate, e.g., between optical waveguides located on different sides thereof. In an example embodiment, the electrically conducting tracks and planar optical waveguides are configured to operatively connect various optoelectronic devices and auxiliary electrical circuits attached to the two sides of the substrate using hybrid-integration technologies. In some embodiments, two or more of such double-sided substrates can be stacked and optically and electrically interconnected to create an integrated three-dimensional assembly.

Optoelectronic circuit having one or more double-sided substrates

An optoelectronic device having three substantially planar substrates arranged such that one of the substrates is orthogonal to the other two substrates. In an example embodiment, the first substrate may have one or more photonic devices configured to emit or receive light traveling substantially orthogonally with respect to a major plane of the first substrate. The second substrate has an optical waveguide circuit thereon that is edge-coupled to receive (or transmit) the light from (to) the one or more photonic devices. The third substrate has an electrical circuit thereon and is connected to form an L-shaped junction with the first substrate, the L-shaped junction providing electrical connections between the corresponding electrical transmission lines located on the first and third substrates, e.g., to communicate electrical signals with the one or more photonic devices. In some embodiments, the optoelectronic device can be used to implement an optical transmitter or receiver.

Arrangement for connecting photonic and electronic components

An apparatus includes a dielectric slab having first and opposing second major surfaces. A planar antenna element is located on the first major surface. A via formed through the dielectric slab is conductively connected to the antenna element. A plurality of solder bump pads is located on the second major surface and is configured to attach the dielectric slab to an integrated circuit.

Radiation efficient integrated antenna

An illustrative assembly includes a first component having a hole between two first component surfaces. The hole includes a first metal layer on the first component inside the hole. A second component includes a second component surfaced adjacent one of the first component surfaces. The second component includes a second metal layer on the second component. A fusible material is at least partially in the hole and at least partially in the recess. The metal alloy establishes a connection between the first and second metal layers.

Method and assembly including a connection between metal layers and a fusible material

An optical assembly for a wavelength-division-multiplexing (WDM) transmitter or receiver that lends itself to cost-effective production-line manufacturing. In one embodiment, the fiber optic assembly has a vernier-type arrayed waveguide grating (AWG) with five optical ports at one side and fourteen optical ports at another side. Ten of the fourteen ports are optically coupled to ten photo-detectors or lasers. A selected one of the five ports is optically coupled to an external optical fiber. The coupling optics and the mounting hardware for the AWG are designed to accommodate, with few relatively straightforward adjustments performed on the production line, any configuration of the AWG in which any consecutive ten of the fourteen ports are optically coupled to the ten photo-detectors or lasers.

Optical assembly for a WDM receiver or transmitter

Apparatus including a chip substrate having a first chip surface facing away from a second chip surface; an array of microelectronic elements on the first chip surface; and an array of conductors each in communication with one of the microelectronic elements, the conductors passing through the chip substrate and fully spanning a distance between the first and second chip surfaces. Process including: providing an apparatus including a chip substrate having a first chip surface facing away from a second chip surface, an array of microelectronic elements being on the first chip surface, an array of conductors each being in communication with one of the microelectronic elements and partially spanning an average distance between the first and second chip surfaces; bonding a temporary support carrier onto the array of microelectronic elements; removing a portion of the chip substrate, thereby reducing the average distance between the first and second chip surfaces; and forming an under bump metallization pad at the second chip surface in electrical communication with a conductor.

Process for making microelectronic element chips

Device having first wick evaporator including first membrane and plurality of first thermally-conductive supports. First membrane has upper and lower surfaces. First membrane also has plurality of pores with upper pore ends at upper surface of first membrane and with lower pore ends at lower surface of first membrane. Each of first thermally-conductive supports has upper and lower support ends. Upper support ends of first thermally-conductive supports are in contact with first membrane. Each of first thermally-conductive supports has longitudinal axis extending between the upper and lower support ends, average cross-sectional area along axis, and membrane support cross-sectional area at upper support end, the membrane support cross-sectional area effectively being smaller than average cross-sectional area. First thermally-conductive supports are configured to conduct thermal energy from lower support ends of first thermally-conductive supports to first membrane. Process includes providing wick evaporator, providing liquid working fluid in contact with lower or upper surface of membrane, and causing liquid working fluid to be evaporated from liquid-vapor interface in membrane.

Thermal energy transfer device

The present invention provides an apparatus. The apparatus, in one embodiment, includes an actuator located over a substrate, a movable feature located over and coupled to the actuator, and a layer of material located above the actuator and movable feature and not constituting part of a beam/spring associated with the movable feature, the layer of material configured as a reservoir having an interior capable of holding a liquid, the movable feature being exposed to the interior.

Apparatus having a layer of material configured as a reservoir having an interior capable of holding a liquid

The invention includes a method and apparatus for controlling curvatures of light directing devices. The apparatus includes a first substrate portion having formed therein a plurality of cavities, and a substantially flexible membrane disposed over the cavities for forming a respective plurality of light directing mechanisms, the light directing mechanisms disposed over the cavities. The respective curvatures of the light directing mechanisms are set using a pressure difference across each of the membrane portions disposed over the cavities. The respective curvatures of the light directing mechanisms may be controllably adjusted during operation of the light directing mechanisms.

Method and apparatus for controlling curvatures of microlenses and micromirrors

The present invention provides an interconnect. The interconnect comprises a pliable surface having a plurality of nanostructures disposed thereon, the pliable surface configured to allow the plurality of nanostructures to at least partially conform to a surface when the nanostructures come into contact therewith.

Interconnect including a pliable surface and use thereof

Microelectronic element chips

The present invention provides a process for manufacturing an apparatus. The process, in one embodiment, includes providing a micro-electro-mechanical system (MEMS) device, the micro-electro-mechanical system (MEMS) device including an actuator coupled to a movable feature, sacrificial material fixing the actuator and movable feature with respect to one another, and a layer of material located over the actuator, movable feature and sacrificial material. The process may further include removing only a portion of the layer of material to expose the sacrificial material, and subjecting the exposed sacrificial material to an etchant to release the movable feature.

Process for manufacturing an apparatus that protects features during the removal of sacrificial materials

A method and apparatus for forming an electrically and/or thermally conducting interconnection is disclosed wherein a first surface and a second surface are contacted with each other via a plurality of nanostructures disposed on at least one of the surfaces. In one embodiment, a first plurality of areas of nanostructures is disposed on a component in an electronics package such as, illustratively, a microprocessor. The first plurality of areas is then brought into contact with a corresponding second plurality of areas of nanostructures on a substrate, thus creating a strong friction bond. In another illustrative embodiment, a plurality of nanostructures is disposed on a component, such as a microprocessor, which is then brought into contact with a substrate. Intermolecular forces result in an attraction between the molecules of the nanostructures and the molecules of the substrate, thus creating a bond between the nanostructures and the substrate.

High density nanostructured interconnection

Growing community of inventors

Trenton, NJ, United States of America

Nagesh R Basavanhally