Texas Instruments Corporation

Nagarajan Viswanathan

Visvesvaraya Appala Pentakota

Jagannathan Venkataraman

Jaiganesh Balakrishnan

Sthanunathan Ramakrishnan

Himanshu Varshney

Jawaharlal Tangudu

Shagun Dusad

Neeraj Shrivastava

Aravind Ganesan

Srinivas Kumar Reddy Naru

Yeswanth Guntupalli

Ajai Paulose

Charls Babu

Vinam Arora

Srinivas Kumar Naru

Mathews John

Rahul Anand Sharma

Sreenath Narayanan Potty

Sashidharan Venkatraman

Francesco Dantoni

Karthikeyan Gunasekaran

Pooja Sundar

Sunil Chomal

Sai Aditya Nurani

Rakesh Chikkanayakanahalli Manjunath

Sanjib Basu

Robert Clair Keller

Ganesh Kiran

Thomas R Neu

Karthik Khanna Subramani

Sarma Sudareswara Gunturi

Parth Sameer Kalgaonkar

Mishab I

Avinash Vasudev Sakleshpur

Aswath V S

Snehasish Roychowdhury

An example analog-to-digital converter (ADC) includes first ADC circuitry, second ADC circuitry, and dither circuitry. The dither circuitry of the example ADC is to generate a first dither signal to produce a first dithered input signal at a first output coupled to an input of the first ADC circuitry, generate a second dither signal to produce a second dithered input signal at a second output coupled to an input of the second ADC circuitry, the first dither signal and the second dither signal to have opposite signs, and produce an output signal at a third output based on the first output of the first ADC circuitry and the second output of the second ADC circuitry.

Dithering techniques for analog-to-digital converters

In an example, a system includes an input channel and a voltage to delay converter (V2D) coupled to the input channel. The system also includes a first multiplexer coupled to the V2D and an analog-to-digital converter (ADC) coupled to the first multiplexer. The system includes a second multiplexer coupled to the input channel and an auxiliary ADC coupled to the second multiplexer. The system includes calibration circuitry coupled to an output of the auxiliary ADC, where the calibration circuitry is configured to correct a non-linearity in a signal provided by the input channel. The calibration circuitry is also configured to determine the non-linearity of the signal provided to the ADC relative to the signal provided to the auxiliary ADC.

Auxiliary ADC-based calibration for non-linearity correction of ADC

A spur correction system for a transmit chain having an interleaving multiplexer. In some embodiments, the spur correction system includes a spur sense chain, a correction controller, and a Q path corrector. The interleaving multiplexer combines signals from multiple bands in response to a clock signal. The spur sense chain estimates an error that is in phase with the clock signal (an I-phase error) and an error that is a derivative of the clock signal (a Q-phase error). The correction controller compensates for the estimated I-phase error by injecting an I-phase correction signal into the transmit chain. The Q path corrector compensates for the estimated Q-phase error by selectively connecting one or more capacitors within the interleaving multiplexer.

F/2 spur estimation and correction

A one-time write, read-only memory for storing trimming parameters includes an address pointer table, a fixed packet portion, and a flexible packet portion. The fixed packet portion includes one or more fixed packets, each fixed packet including trimming parameters for a component identified for trimming during a design phase. The flexible packet portion includes one or more flexible packets of different types. Each flexible packet includes trimming parameters for a component identified for trimming after the design phase. One packet type includes a length section and a number of fields equal to a value stored in the length section. Each field includes an address, a trimming parameter, and a mask. Another packet type includes trimming parameters associated with operands in operating instructions for a microcontroller, where the operands include an address and a mask.

Flexible and efficient device trim support using eFuse

A system includes a pseudorandom binary sequence (PRBS) generator configured to generate a first PRBS and a second PRBS and an exclusive-OR logic configured to exclusive-OR the first PRBS and the second PRBS to compute a third PRBS. The system also includes an adder, a correlator and a corrector. The adder adds the third PRBS to input data to compute summed data for transmission of the summed data across the channel. The correlator computes the exclusive-OR of the first PRBS and the second PRBS to reproduce the third PRBS and correlates output data from the channel to the reproduced third PRBS to compute a channel gain error and a channel memory error. The corrector extracts the input data from the output data from the channel using the computed channel gain and memory errors.

Bias removal in PRBS based channel estimation

Flexible and efficient device trim support using efuse

The disclosure provides a circuit. The circuit includes a zone detection block that generates a control signal in response to an input signal. An amplifier generates an amplified signal in response to the input signal and the control signal. An analog to digital converter (ADC) is coupled to the amplifier and samples the amplified signal to generate a digital signal. A digital corrector is coupled to the zone detection block and the ADC, and transforms the digital signal to generate a rectified signal based on the control signal and an error signal. An error estimator is coupled to the zone detection block and receives the rectified signal as a feedback. The error estimator generates the error signal in response to the control signal and the rectified signal.

Sample based gain error estimation for analog to digital converter

Optical time domain reflectometer (OTDR) systems, methods and integrated circuits are presented for locating defects in an optical cable or other optical cable, in which a first optical signal is transmitted to the cable and reflections are sampled over a first time range at a first sample rate to identify one or more suspected defect locations, and a second optical signal is transmitted and corresponding reflections are sampled over a second smaller time range at a higher second sample rate to identify at least one defect location of the optical cable for relaxed memory requirements in the OTDR system.

Method and OTDR apparatus for optical cable defect location with reduced memory requirement

Methods and apparatus for reducing non-linearity in analog to digital converters are disclosed. An example apparatus includes an analog-to-digital converter to convert an analog signal into a digital signal; and a non-linearity corrector coupled to the analog-to-digital converter to determine a derivative of the digital signal; determine cross terms including a combination of the digital signal and the derivative of the digital signal; and determine a non-linearity term corresponding to a combination of the cross terms.

Methods and apparatus to reduce non-linearity in analog to digital converters

A direct down-conversion (DDC) front end receiver includes first Q-channel that filters a sum of PRBS and baseband quadrature signals to generate a first filtered quadrature signal, a second Q-channel that filters a difference of the baseband and PRBS signals to generate a second filtered quadrature signal, a first I-channel and a second I-channel, Q-path and I-path PRBS cancellation blocks for cancelling corresponding PRBS components from sum of first and second filtered quadrature signals and sum of first and second filtered inphase signals respectively, Q-path and I-path sum filter estimation blocks for estimating quadrature and inphase sum filter responses. An IQ mismatch compensation filter estimate and tracking block estimates IQ mismatch compensation filter response from estimated quadrature and inphase sum filter responses, and an IQ mismatch compensation filter filters the modified inphase signal with the IQ mismatch compensation filter response, to generate a filter compensated inphase signal.

Wideband IQ mismatch correction for direct down-conversion receiver

In described examples, an analog to digital converter (ADC) includes a main ADC and a reference ADC. The main ADC generates a zone information signal and a digital output in response to an input signal. The reference ADC receives a plurality of reference voltages from the main ADC. The plurality of reference voltages includes a first reference voltage and a second reference voltage. The reference ADC generates a reference output in response to the input signal, the first reference voltage and the second reference voltage. A subtractor generates an error signal in response to the digital output and the reference output. A logic block generates one of a first offset correction signal, a second offset correction signal and a gain mismatch signal in response to the zone information signal, the error signal and the reference output.

Gain and offset correction in an interpolation ADC

An optical data transmitter is operable to transmit data other than test data on an optical fiber at a first wavelength and an optical time domain reflectometer is operable to receive data from the optical fiber at the first wavelength and to use the received data at the first wavelength to determine whether a defect exists in the optical fiber.

Optical fiber defect detection

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Bengaluru, India

Nagarajan Viswanathan