Intel Corporation

Naga Sivakumar Yagnamurthy

Pramod Malatkar

Kyle Yazzie

Rajesh Kumar Neerukatti

Robert L Sankman

Chia-Pin Chiu

Yonggang Li

Robert M Nickerson

Dilan Seneviratne

Praneeth Kumar Akkinepally

Mohit Mamodia

Mark J Gallina

Richard J Harries

David C McCoy

Prasanna Raghavan

Huiyang Fei

Joseph Bautista

Frank P Prieto

Michael Gregory Drake

Xuefei Wan

Disclosed herein are systems and methods for mechanical failure monitoring, detection, and classification in electronic assemblies. In some embodiments, a mechanical monitoring apparatus may include: a fixture to receive an electronic assembly; an acoustic sensor; and a computing device communicatively coupled to the acoustic sensor, wherein the acoustic sensor is to detect an acoustic emission waveform generated by a mechanical failure of the electronic assembly during testing.

Mechanical failure monitoring, detection, and classification in electronic assemblies

An electronic package that includes a substrate and an electronic component attached to the substrate. A laminated layer is attached to an upper surface of the substrate such that the laminated layer covers the electronic component. The electronic package may further include a stiffener mounted on the laminated layer where the stiffener is over the electronic component.

Electronic package that includes lamination layer

Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.

Integrated circuit packages with patterned protective material

Methods of forming a package structures comprising a trench are described. An embodiment includes a first die disposed on a first substrate, and at least one interconnect structure disposed on a peripheral region of the first substrate. A molding compound is disposed on a portion of the first substrate and on the first die, wherein a trench opening is disposed in the molding compound that is located between the at least one interconnect structure and the first die.

Methods of forming trenches in packages structures and structures formed thereby

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Chandler, AZ, United States of America

Naga Sivakumar Yagnamurthy