Amazon Technologies, Inc.

Other

Marvell International Limited

Marvell Israel (misl) Ltd.

Marvellworld Trade Ltd.

Marvell Semiconductor, Inc.

Annapuma Labs Ltd.

Annapurna Labs Ltd.

Nafea Bshara

Erez Izenberg

Georgy Machulsky

Leah Shalev

Adi Habusha

Asif Khan

Mark Bradley Davis

Christopher Joseph Pettey

Guy Nakibly

Said Bshara

Ron Diamant

Anthony Nicholas Liguori

Robert Michael Johnson

Matthew Shawn Wilson

Islam Mohamed Hatem Abdulfattah Mohamed Atta

Brian William Barrett

Thomas A Volpe

Yaniv Shapira

Darin Lee Frink

Kiran Kalkunte Seshadri

Saar Gross

Netanel Israel Belgazal

Kypros Constantinides

Evgeny Schmeilin

Munif M Farhan

Prateek Tandon

Ziv Harel

Alexander Matushevsky

Swaminathan Sivasubramanian

Sudipta Sengupta

Leo Parker Dirac

Andrea Olgiati

Gil Stoler

Poorna Chand Srinivas Perumalla

Matthew James Wood

Ofer Naaman

Dominic Rajeev Divakaruni

Islam Atta

Bratin Saha

Barak Wasserstrom

Phyllis Ng

Eric Jason Brandwine

David Melman

Sundeep Amirineni

Jaspal Kohli

Jason Alexander Harland

Nir Haim Arad

Uwe Dannowski

Raviprasad Venkatesha Murthy Mummidi

Uri Leder

Hani Ayoub

Benzi Denkberg

Ofer Frishman

Ronen Shitrit

Ali Elashri

Yotam Admon

Peter Nicholas Desantis

Michael Orr

Zorik Machulsky

Leonard Thomas Tracy

Nicholas Patrick Wilt

Nathan Lee Burns

Christopher James BeSerra

Luke Thomas Gregory

Raymond Scott Whiteside

Ashutosh Tambe

Clint Joseph Sbisa

Itay Poleg

Shay Madar

William Lo

Gil Levy

Tsahi Daniel

Randy Renfu Huang

Carmi Arad

Douglas Stewart Laurence

Aviran Kadosh

Alan Michael Judge

Ali Ghassan Saidi

Rahul Sharma

Justin Oliver Pietsch

Mark Banse

Ori Weber

Kari Ann O'Brien

Mark Noel Kelly

Stephen Callaghan

David Robert Thomas

Itai Avron

Charan Srinivasan

Rick Chun Kit Cheung

Edward Crabbe

Noah Thomas Kelly

Rabeeh Khoury

Priti Choudhary

Svetlana Kantorovych

Jalaja C Kurubarahalli

Julien Ridoux

Joshua Benjamin Levinson

Pragya Agarwal

Tal Zilcer

Asif Kahn

The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include encrypting the configuration data to generate encrypted configuration data. The method can include signing the encrypted configuration data using a private key. The method can include transmitting the signed encrypted configuration data in response to the request.

Logic repository service using encrypted configuration data

Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network. In one example, RDMA functionality is provided by combining a host executing instructions for RDMA software applications with dedicated hardware accelerator, where the host has access to substantially all RDMA connection context (e.g., configuration, status, state machine, counters, etc.) and a hardware accelerator stores a portion of the context information for a set of currently active transactions. The hardware accelerator derives a transaction identifier from header information in received RDMA packets and performs a local RDMA operation using at least a portion of the received data, a destination address of the location RDMA operation being based at least in part on a memory address determined using the transaction identifier.

Transaction based remote direct memory access

Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

Flexible remote direct memory access

Disclosed herein is a method including receiving, from a user application, data to be transmitted from a source address to a destination address using a single connection through a network; and splitting the data into a plurality of packets according to a communication protocol. For each packet of the plurality of packets, a respective flowlet for the packet to be transmitted in is determined from a plurality of flowlets. Assignment of the flowlets to the packets can be dynamically adjusted based on utilization of the flowlets.

Multi-path transport design

Provided are systems and methods for a storage adapter device for communicating with network storage. In some implementations, the storage adapter device comprises a host interface. In these implementations, the host interface may be configured to communicate with a host device using a local bus protocol. In some implementations, the storage adapter device also includes a network interface. In these implementations, the network interface may communicate with a network using a network protocol. In some implementations, the storage adapter device may be configured to communicate with a remote storage device. In some implementations, the storage adapter device may also be configured to translate a request from the host interface from the local bus protocol to the network protocol. The storage adapter device may further be configured to transmit the translated request to the remote storage device.

Storage adapter device for communicating with network storage

A resource manager of a virtualized computing service indicates to a client that FPGA-enabled compute instances are supported at the service. From a set of virtualization hosts of the service, a particular host from which an FPGA is accessible is selected for the client based on an indication of computation objectives of the client. Configuration operations are performed to prepare the host for the application, and an FPGA-enabled compute instance is launched at the host for the client.

FPGA-enabled compute instances

Methods, systems, and computer-readable media for virtualizing graphics processing in a provider network are disclosed. A virtual compute instance is provisioned from a provider network. The provider network comprises a plurality of computing devices configured to implement a plurality of virtual compute instances with multi-tenancy. A virtual GPU is attached to the virtual compute instance. The virtual GPU is implemented using a physical GPU, and the physical GPU is accessible to the virtual compute instance over a network. An application is executed using the virtual GPU on the virtual compute instance. Executing the application generates virtual GPU output that is provided to a client device.

Virtualizing graphics processing in a provider network

A computer system includes a processor module comprising a vapor chamber heat spreader for removing heat from a bare die processor. The vapor chamber heat spreader may be coupled with the bare die processor via a mounting structure. The vapor chamber heat spreader may have a pedestal that extends towards the bare die processor, such that a bottom surface of the pedestal is positioned proximate a top surface of the bare die processor. In various embodiments, the processor module may be configured to enable servicing of one or more components. For example, the processor module may have a mechanism that allows for uncoupling the vapor chamber heat spreader from the bare die processor, so as to enable replacement of the bare die processor in some embodiments.

Vapor chamber heat spreader for bare die processors

Methods and apparatuses for improving network packet transmission performance in terms of latency with reduced packet retransmission times and fewer packet drops in congested networks are provided. Packet-switched networks can experience long delays while waiting for out-of-order packets or re-transmissions of lost packets. In addition, network faults such as transmission path failures can result in excessive delay while attempting to find a new route over which to transmit packets. To improve packet transmission performance, application data may be encapsulated into first network packets by a first transport protocol having an interface exposed to the application, in the first network packets may be encapsulated into second network packets according to a second transport protocol. The second transport protocol can enable the second network packets of a same packet flow to be transmitted across multiple paths over the network.

Ethernet traffic over scalable reliable datagram protocol

The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

Configurable logic platform

A packet processing technique can include receiving a packet, and parsing the packet based on a protocol field to generate a parse result vector. The parse result vector is used to select between forwarding the packet to a virtual machine executing on a host processing integrated circuit, forwarding the packet to a physical media access controller, multicasting the packet to multiple virtual machines executing on the host processing integrated circuit, and sending the packet to a hypervisor.

Configurable parser and a method for parsing information units

A computer system includes a chassis comprising location indicating elements, such as springs, magnets, standoffs, or other types of location indicating elements physically attached to the chassis in a configuration that indicates locations in the chassis. Also, the computer system includes multiple printed circuit boards comprising pads configured to interface with the location indicating elements, wherein combinations of sensed or not sensed location indicating elements at the pads of the printed circuit boards provide a physically verified placement location for the printed circuit boards.

Board physical placement verification in a server chassis

A resource request is received by a peripheral device from host processing logic. The resource request includes a requested resource size. The peripheral device allocates resource of the peripheral device in response to the resource request. A resource response is sent by the peripheral device to the host processing logic. The resource response includes a location of the allocated resource.

Dynamic resource management of network device

A technique for remote direct memory access (RDMA) may include receiving a packet that was sent over a network, and determining the packet has metadata used for queue selection. The technique may also include selecting a queue based on the metadata, and writing the data of the packet to an application memory using the datapath associated with the selected queue. Amended metadata can be generated to indicate that the data has been written to the application memory, and the amended metadata can be stored in a software accessible buffer.

Hybrid remote direct memory access

Implementations detailed herein include description of a computer-implemented method. In an implementation, the method at least includes attaching a first set of one or more accelerator slots of an accelerator appliance to an application instance of a multi-tenant provider network according to an application instance configuration, the application instance configuration to define per accelerator slot capabilities to be used by an application of the application instance, wherein the multi-tenant provider network comprises a plurality of computing devices configured to implement a plurality of virtual compute instances, and wherein the first set of one or more accelerator slots is implemented using physical accelerator resources accessible to the application instance; while performing inference using the loaded machine learning model of the application using the first set of one or more accelerator slots on the attached accelerator appliance, managing resources of the accelerator appliance using an accelerator appliance manager of the accelerator appliance.

Fault-tolerant accelerator based inference service

Growing community of inventors

San Jose, CA, United States of America

Nafea Bshara