Motorola Corporation

Freescale Semiconductor,inc.

Nada El-Zein

Jamal Ramdani

Ravindranath Droopad

Kurt W Eisenbeiser

Herbert Goronkin

Vijay K Nair

Charles E Weitzel

George N Maracas

Kumar Shiralagi

Jonathan Lewis

Mandar R Deshpande

High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Heterojunction tunneling diodes and process for fabricating same

High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. These semiconductor materials have applications involving communications with high frequency signals including intelligent transportation systems such as automobile radar systems, smart cruise control systems, collision avoidance systems, and automotive navigation systems; and electronic payment systems that use microwave or RF signals such as electronic toll payment for various transportation systems including train fares, and toll roads, parking structures, and toll bridges for automobiles.

Semiconductor structure for use with high-frequency signals

An integrated smart power circuit including a power semiconductor device fabricated on a conducting substrate with a source positioned adjacent the upper surface of the substrate, a control terminal between the upper and lower surfaces, and a drain positioned adjacent the lower surface of the substrate. A high resistance layer is formed on a portion of the upper surface of the substrate, either directly overlying or adjacent to the power device, and doped semiconductor material is positioned on the high resistance layer. Control circuitry is formed in the doped semiconductor material. The high resistance layer can be conveniently formed by growing a layer of AlAs and growing doped layers on the AlAs. The AlAs can be easily oxidized thereafter.

3-D smart power IC

A heterostructure interband tunneling diode includes a contact layer comprising indium gallium arsenide of a first conductivity type, an injection layer comprising indium gallium arsenide of a second conductivity type, a first doped layer of the first conductivity type positioned adjacent to the contact layer, and a second doped layer of a second conductivity type juxtaposed between the first doped layer and the injection layer, wherein at least one of the first and second tunnel barrier layers comprises indium aluminium arsenide. A second embodiment includes a doped layer of the first conductivity type positioned adjacent to the contact layer, and a barrier layer positioned adjacent to the injection layer, and a quantum well layer comprising indium gallium arsenide juxtaposed between the doped layer and the barrier layer, wherein at least one of the doped and barrier layers comprises indium aluminium arsenide.

Heterostructure interband tunneling diode

A VCO includes a transistor having a plurality of negative differential resistance devices coupled in series to the source terminal of the transistor, with each of the devices having a negative differential resistance operating region. Biasing circuits are coupled to the drain and gate terminals along with operating voltages which set the oscillator to operating in a negative differential resistance region of at least one of the negative differential resistance devices so that oscillations of a selected frequency are produced at an output terminal. The transistor, the plurality of N devices, the DC biasing circuits, and the operating voltages are connected so that the oscillator negative differential resistance operating region is greater than N times as wide as each of the device negative differential operating regions individually.

Growing community of inventors

Phoenix, AZ, United States of America

Nada El-Zein