Apple Inc.

Mil Computing, Inc.

Nachum M Kanovsky

Marc Albrecht

Xiaokai Li

David Arthur Yost

Roger Rawson Godard

Arthur David Kahlich

Tobias Jung

Simone Gambini

Long Kong

Sebastien Paul Maurice Mirolo

Cristian Marcu

Ameya Y Joshi

A computer system may periodically calibrate an oscillator subsystem, which includes a voltage-controlled oscillator circuit configured to generate an oscillator signal using code signal. In response to activation of a calibration mode, an iterative calibration operation may be performed on the voltage-controlled oscillator circuit. In some cases, performing a given iteration of the calibration operation includes determining a value of the code signal using a number of pulses in the oscillator signal sampled during a particular time period, along with previous values of the code signal and a slope of an error function associated with the difference between a desired frequency and a current frequency of the oscillator signal. In other cases, iterations may employ variable sampling times with error handling, in order to decrease the duration of the calibration operation while maintaining a target accuracy.

Voltage-controlled oscillator calibration

Aspects of the subject technology relate to display circuitry including pixel overdrive circuitry. The pixel overdrive circuitry includes a compression engine that compresses a previous display frame, for storage and comparison to a current display frame without compression or decompression of the current display frame. The compression engine compresses the previous frame in such a way that the maximum compression error is always known and can be used to determine whether to perform overdrive operations for the current frame without compressing and decompressing the current display frame. The compression engine selects gradient encoding or decimation encoding for the compression of the previous display frame and can perform successive decimation operations within the gradient encoding operations to help reduce the size of the compressed previous frame while maintaining the quality of the ultimate overdriven current frame.

Display pixel overdrive systems and methods

A computer processor and corresponding method of operation employs execution logic that includes at least one functional unit and operand storage that stores data that is produced and consumed by the at least one functional unit. The at least one functional unit is configured to execute a deferred operation whose execution produces result data. The execution logic further includes a retire station that is configured to store and retire the result data of the deferred operation in order to store such result data in the operand storage, wherein the retire of such result data occurs at a machine cycle following issue of the deferred operation as controlled by statically-assigned parameter data included in the encoding of the deferred operation.

Computer processor with deferred operations

Growing community of inventors

Sunnyvale, CA, United States of America

Nachum M Kanovsky