Samsung Electronics Co., Ltd.

Na-rae Shin

Jae-Min Jung

Jeong-Kyu Ha

So-Young Lim

Pa-Lan Lee

Kyoung-Suk Yang

Hee-Seok Lee

Yun-seok Choi

Kyong-Soon Cho

Kwan-Jai Lee

Young-Sang Cho

Donghan Kim

Ji-yong Park

Jun-ho Song

Hee-jung Hwang

Eun-seok Song

Young-hun Jung

Kyoung-suk Yang

A film type semiconductor package includes a film substrate; a metal pattern extending a first length in a first direction on the film substrate, having a first width in a second direction perpendicular to the first direction the first length being larger than the first width, and includes a plurality of through holes spaced apart from each other in the first direction; a semiconductor chip including a plurality of pads; and a plurality of bumps spaced apart from each other in the first direction, bonded with the metal pattern, and overlapping the plurality of through holes and connected to the pads of the semiconductor chip.

Film type semiconductor package

A semiconductor package includes: a semiconductor chip including an effective chip region at a center of the semiconductor chip and in which pads connected to chip wirings are formed, and a dummy chip region at a side of the effective chip region and in which pads not connected to the chip wirings are formed; a base film including a chip mounting section on which the semiconductor chip is mounted; and a plurality of wiring patterns disposed on the base film and electrically connected to the chip wirings of the semiconductor chip, wherein first wiring patterns, which are a part of the plurality of wiring patterns, extend on a first region of the chip mounting section corresponding to the dummy chip region.

Tape wiring substrate, semiconductor package, and display apparatus including semiconductor package

A chip on film (COF) package includes a film substrate, first leads on a first surface of the film substrate, the first leads having a first length, and second leads on the first surface of the film substrate, the second leads having a second length larger than the first length, first via plugs penetrating the film substrate and connected to first ends of the first leads, and second via plugs penetrating the film substrate and connected to first ends of the second leads, and first connection leads on a second surface of the film substrate facing the first surface, the first connection leads having first ends connected to the first via plugs, and second connection leads on the second surface of the film substrate, the second connection leads having first ends electrically connected to the second via plugs.

Chip on film package including distributed via plugs

A chip on film package includes a flexible base film having a first surface and a second surface opposite to each other that includes at least one through hole therein, a plurality of wirings disposed on the first surface and the second surface of the base film, respectively, that include a first lead and a second lead connected to each other through the at least one through hole, and a display panel driving chip and a touch panel sensor chip, each mounted on any one of the first surface and the second surface of the base film, wherein at least one of the display panel driving panel and the touch panel sensor chip is electrically connected to the first and second leads.

Chip on film package and display device including the same

A COF substrate may include a base film, first upper conductive patterns, at least one second upper conductive pattern and lower conductive patterns. The first upper conductive patterns may be arranged on an upper surface of the base film. Each of the first upper conductive patterns may have an inner pattern and an outer pattern spaced apart from each other. The second upper conductive pattern may be arranged on the upper surface of the base film between the first upper conductive patterns. The lower conductive patterns may be arranged on a lower surface of the base film. The lower conductive patterns may be electrically connected between the inner pattern and the outer pattern. Thus, conductive materials causing a short between the panel patterns may not exist between the inner pattern and the outer pattern on the upper surface of the base film.

Chip on film (COF) substrate, COF package and display device including the same

Example embodiments relate to an interconnection substrate and a semiconductor chip package and a display system including the same. The interconnection substrate may include a base film, a signal line provided on the base film, a power line provided on the base film as a line pattern including a plurality of bent portions, and a ground line provided on the base film in parallel with the power line. The interconnection substrate may further include a semiconductor chip provided on the base film, wherein the power, ground, and/or signal lines are electrically connected to the semiconductor chip to form a semiconductor chip package. A display system may include the above semiconductor chip package, a screen displaying an image, and a PCB generating a signal. The semiconductor chip may be connected between the PCB and the screen and relay the generated signal from the PCB to the screen. Use of the power, ground, and/or signal lines having a plurality of bent portions may reduce electromagnetic interference (EMI) within the display system.

Interconnection substrate, semiconductor chip package including the same, and display system including the same

A semiconductor package comprising alignment members is provided. The semiconductor package includes a semiconductor die, first connection terminals disposed on a first surface of the semiconductor die, and a tape substrate including a substrate portion, and second connection terminals disposed on the substrate portion and disposed corresponding to the first connection terminals. The semiconductor package further includes a first alignment member disposed on the first surface of the semiconductor die, and a second alignment member disposed on the substrate portion of the tape substrate and disposed corresponding to the first alignment member.

Semiconductor package comprising alignment members

A package may include a semiconductor chip mounted on a film substrate. A method of manufacturing the same may involve providing a semiconductor chip. The semiconductor chip may include recesses and bumps. A film substrate including a through hole may be provided. The semiconductor chip may be inserted into the through hole of the film substrate. Circuit wires may be formed on the film substrate to contact the bumps of the semiconductor chip.

Semiconductor package and method of manufacturing the same

An adjustable-inductance (AI) filter, a tape distribution substrate including the filter, and a display panel assembly including the tape distribution substrate are provided. The adjustable-inductance (AI) filter includes a filter distribution line including first and second end portions each having a first line width, at least one repair pattern having a second line width and disposed between the first and second end portions, and at least one unit filter bank connected in parallel to the at least one repair pattern, respectively.

Growing community of inventors

Yongin-si, South Korea

Na-rae Shin