Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Myung-Jae Park

Hyang-Shik Kong

Young-Joon Rhee

Jang-Kun Song

Sung-Hoon Kim

Jae-Jin Lyu

Jeong-Ho Lee

Yoon-Sung Um

Seung-beom Park

Min-Wook Park

Keun-Chan Oh

Hyeong-Jun Park

Su-Jeong Kim

Nak-Cho Choi

Jun-Hyup Lee

Youn-Hak Jeong

Woo-Jung Shin

Gak-Seok Lee

Sang-Gyun Kim

Kyong-Sik Choi

Dong-Gyu Kim

Jong-Woong Chang

Woon-Yong Park

Seong-Young Lee

Myung-Koo Hur

Kwon-Young Choi

Sang-Ki Kwak

Young-Mi Tak

Young-Jae Tak

Seung-Ho Ahn

A liquid crystal display panel, including: a first substrate including a common electrode; a second substrate including a plurality of pixels which are arranged in a matrix form and face the common electrode, wherein at least one of the pixels includes first and second subpixels; the first subpixel including a first subpixel electrode, wherein the first subpixel electrode includes a plurality of first micro branches, which are arranged at a first angle with respect to a polarization axis of a polarizer disposed adjacent to the first or second substrate; the second subpixel including a second subpixel electrode, wherein the second subpixel electrode includes a plurality of second micro branches, which are arranged at a second angle with respect to the polarization axis of the polarizer, wherein the first angle is different from the second angle by about 20&#xb0; or less; and a liquid crystal layer interposed between the first and second substrates.

Pixel electrode panel, a liquid crystal display panel assembly and methods for manufacturing the same

A liquid crystal display panel, including: a pixel electrode formed on a first substrate; an alignment layer formed on the pixel electrode, wherein the alignment layer includes an alignment layer material and aligns first liquid crystal molecules in a direction substantially perpendicular to the pixel electrode; and a photo hardening layer formed on the alignment layer, wherein the photo hardening layer includes a photo hardening layer material and aligns second liquid crystal molecules to be tilted with respect to the pixel electrode, wherein the alignment layer material and the photo hardening layer material have different polarities from each other.

A liquid crystal display device is provided, including a liquid crystal layer interposed between a first display panel and a second display panel; and an alignment film formed on at least one of the first and second display panels, the alignment film including first polysiloxanes and second polysiloxanes disposed on the first polysiloxanes, wherein a first portion of silicon atoms of the second polysiloxanes are bonded to vertical functional groups interacting with liquid crystal molecules in the liquid crystal layer, and to first pre-tilting functional groups aligning the liquid crystal molecules in the liquid crystal layer to be tilted with respect to at least one of the first and second display panels by being cross-linked. The bonding structure of the first and the second polysiloxanes being different.

Liquid crystal display device, alignment film, and methods for manufacturing the same

A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

Contact structure of conductive films and thin film transistor array panel including the same

A first wiring is formed on an array substrate, such that the first wiring has a first protrusion. A second wiring is formed on a different layer from that of the first wiring, such that a portion of the second wiring overlaps with the first protrusion. A protection layer that covers the first and second wirings is formed, such that the protection layer has first and second contact holes that expose the first and second wirings, respectively. Then, a third wiring that electrically connects the first wiring to the second wiring through the first and second contact holes is formed. When electrical connection between the first and second wirings is abnormal, a laser beam is irradiated toward the first protrusion, so that the electrical connection may be repaired.

Array substrate, method of manufacturing the same and display apparatus having the same

An OLED apparatus includes a substrate, a TFT, a scan line, a data line, a power supply line, a color filter, a pixel electrode, a light emitting layer and a counter electrode. The TFT is formed on the substrate. The scan line transmits a scan signal to a control electrode of the TFT. The data line transmits a data signal to the TFT. Bias voltages are applied to the TFT through the power supply line. The color filter overlaps with one or more of the scan line, the data line and the power supply line. The pixel electrode overlaps with one or more of the scan line, the data line and the power supply line. The light-emitting layer is formed on the pixel electrode. The counter electrode is formed on the light-emitting layer. Therefore, cross talk may be reduced and the opening ratio increased to enhance luminance.

Color filter panel, organic light emitting display apparatus and method of manufacturing the same

A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.

Thin film panel for preventing stitch defect

A thin film transistor array panel is provided, which includes: a gate line; first and second data lines insulated from the gate line; a thin film transistor connected to the gate line and the first data line; a pixel electrode disposed between the first data line and the second data line, spaced apart from the first and the second data lines, and coupled to the thin film transistor; and first and second projections connected to the pixel electrode and overlapping the first and the second data lines, respectively.

Thin film array panel

Thin film panel having particular pixel electrodes overlapping particular data line portions

In a method of manufacturing a liquid crystal display using a divisional exposure for a substrate, an overlapping area at the boundary between adjacent shots is provided and the shots left and right to the boundary are exposed in a way that the areas of the shots gradually decreases and gradually increases, respectively, to reduce the brightness difference due to stitch errors between the two shots. For example, the number of unit stitch areas assigned to the left gradually decreases and the number of unit stitch areas assigned to the right shot gradually increases as it goes to the right along the transverse direction in the stitch area. A unit stitch includes an area obtained by dividing a pixel into at least two parts.

Divisionally exposing an active area in LCD with a plurality of shots

A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on the presence of an organic insulating layer.

Liquid crystal display and thin film transistor array panel

A liquid crystal display is provided, which includes a gate line formed on a first insulating substrate, a data line intersecting the gate line and insulated from the gate line, a pixel electrode provided in a pixel area defined by the intersection of the gate line and the data line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal layer interposed between the pixel electrode and the common electrode, a first cutout in the pixel electrode, and a second cutout provided in the common electrode and partitioning the pixel area into a plurality of domains along with the first cutout. The plurality of domains in the pixel area are classified into at least two types based on thickness of the liquid crystal layer.

An LCD having a plurality of test pads applied with a common voltage, covered with respective shielding conductor or located sufficiently far from pixels. A gate wire including pluralities of gate lines and test pads disconnected from the gate lines and located near one ends of the gate lines, and a common electrode wire including a plurality of common electrodes and a common electrode pad connected to the common electrode electrodes are formed on a substrate, and covered with a gate insulating film. A data wire and a pixel electrode wire are formed thereon and covered with a passivation film. The passivation film and the gate insulating film have contact holes exposing the test pads and the common electrode pad. A plurality of connecting members which are connected to the test pads and the common electrode pad through the contact holes are formed on the passivation film. Alternatively, the passivation film and the gate insulating layer have contact holes exposing only the common electrode pad, and a plurality of shielding members are provided on the passivation layer to be connected to the common electrode pad and to cover the test pads. Alternatively, the distance between the gate lines and the test pads is equal to or larger than twice the width of the pixel.

Growing community of inventors

Suwon-si, South Korea

Myung-Jae Park