Samsung Electronics Co., Ltd.

Myung-jae Lee

Young-soo Park

Ki-Hwan Kim

Seung-eon Ahn

Chang-bum Lee

Xianyu Wenxu

Yoon-Dong Park

Seung-hoon Lee

Sang-bum Suh

Sung-kwan Heo

Jae-Min Park

Byung-woan Kim

Seong-yeol Park

Bo-soo Kang

Min-sung Jang

A resistive memory device includes a first electrode and a first insulation layer arranged on the first electrode. A portion of the first electrode is exposed through a first hole in the first insulation layer. A first variable resistance layer contacts the exposed portion of the first electrode and extends on the first insulation layer around the first hole. A first switching device electrically connects to the first resistive switching layer.

Resistive memory devices and methods of manufacturing the same

A method and apparatus to restore a system using virtualization, the method including: if a system restoration at a target restoration time point from among at least one restoration time points is requested, generating a virtualization layer; if a use of a system is requested by an application layer, accessing the target restoration time point using the virtualization layer; and performing a system restoration at the accessed target restoration time point.

Method and apparatus for restoring system using virtualization

Provided are resistive random access memories (RRAMs) and methods of manufacturing the same. A RRAM includes a storage node including a variable resistance layer, a switching device connected to the storage node, and a protective layer covering an exposed part of the variable resistance layer. The protective layer includes at least one of aluminum oxide and titanium oxide. The variable resistance layer is a metal oxide layer.

Resistive random access memories and methods of manufacturing the same

Example embodiments provide a method for programming a resistive memory device that includes a resistance conversion layer. The method may include applying multiple pulses to the resistance conversion layer. The multiple pulses may include at least two pulses, where a magnitude of each pulse of the at least two pulses is the same. A first pulse of the at least two pulses may be applied on one side of the resistance conversion layer and a second pulse of the at least two pulses may be applied on the other side of the resistance conversion layer. The applying step may be performed during a set programming operation or a reset programming operation. A resistive memory device for programming a resistance conversion layer may include a first and second electrode, a lower structure, and the resistance conversion layer coupled between the first and second electrodes. The resistance conversion layer may be configured to receive multiple pulses, where the multiple pulses include at least two pulses having the same magnitude.

Resistive memory device for programming resistance conversion layers and method thereof

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Suwon-si, South Korea

Myung-jae Lee