Samsung Electronics Co., Ltd.

Myoungsoo Kim

Eun Young Lee

YoonKyung Choi

Sungil Jo

Changyun Lee

Sangchul Han

Seunghun Seo

Bora Yoon

Sanghun Seo

Seunghyun Chung

Wonsuk Yang

Daeman Seo

Woojin Song

A plasma processing apparatus includes a chamber having an upper wall with a plurality of through holes and a lower wall with an exhaust hole, the chamber defining a plasma processing space; a substrate stage disposed within the chamber, the substrate stage having a seating surface, wherein a substrate is seated on the seating surface; a baffle plate disposed between the upper wall and the substrate stage, the baffle plate having gas distribution holes; a gas supply configured to supply gas into the chamber through the through holes; a pumping device having an exhaust pipe, the exhaust pipe connected to the exhaust hole to control pressure inside the chamber; and a plasma generator configured to generate a first plasma using the gas supplied into the chamber through at least one of the through holes formed in the upper wall.

Plasma processing apparatus and semiconductor device manufacturing method

An integrated circuit is provided. The integrated circuit includes a substrate, one or more active devise such as one or more transistors arranged on the substrate, a plurality of interlayer dielectrics arranged on the substrate, a first metallization pattern arranged on the plurality of interlayer dielectrics, a first lower electrode arranged on the first metallization pattern, a first dielectric layer arranged on the first lower electrode, and a first upper electrode arranged on the first dielectric layer, wherein a thickness of the first metallization pattern in a first direction perpendicular to the substrate is not uniform, e.g. is variable, e.g. is not planar.

Integrated circuit

A plasma generator includes a coaxial tube assembly, a radio frequency (RF) electrode, and a feed including an inner circumferential surface that defines a first and second recesses at opposite, first and second ends of the feed. A first protrusion of the coaxial tube assembly is coupled to the first recess of the feed. A second protrusion of the coaxial tube assembly is coupled to the second recess of the feed. The feed includes first and second inner surfaces that define first and second insertion grooves in the inner circumferential surface at the first and second ends of the feed, respectively. First and second coil springs are at least partially within the first and second insertion grooves, respectively. The coaxial tube assembly, the RF electrode, and the feed provide an RF power transmission path based on the feed being coupled between the coaxial tube assembly and the RF electrode.

Plasma generator

A light emitting device includes a substrate; a circuit region including a circuit device on the substrate; an insulating layer on the circuit region; a first light emitting region connecting portion, a second light emitting region connecting portion, and a third light emitting region connecting portion, in the insulating layer; and a light emitting portion including a first light emitting region on the first light emitting region connecting portion, a second light emitting region on the second light emitting region connecting portion, and a third light emitting region on the third light emitting region connecting portion, the first light emitting region connecting portion includes first light reflective layers including a first lower light reflective layer, a first intermediate light reflective layer on the first lower light reflective layer, and a first upper light reflective layer on the first intermediate light reflective layer, and at least one first via plug connected to the first light emitting region, the second light emitting region connecting portion includes second light reflective layers including a second lower light reflective layer, and a second upper light reflective layer on the second lower light reflective layer, and at least one second via plug connected to the second light emitting region, and the third light emitting region connecting portion includes a third light reflective layer, and a third via plug connected to the third light emitting region.

Light emitting device and method of manufacturing the same

An OLED including a substrate; a circuit region; reflective metal layers on the circuit region and including first to third reflective metal layers spaced apart from each other; an insulating layer including first to third insulating regions covering upper surfaces of the reflective metal layers and having a first to third thicknesses that are different from one another; first to third via plugs penetrating through the insulating layer to contact the reflective metal layers, first electrodes in contact with the via plugs, and covering a portion of an upper surface of the insulating layer; an organic light emitting layer on the first electrodes; and a second electrode on the organic light emitting layer, wherein the first to third via plugs include tungsten.

Organic light emitting device and method of manufacturing the same

The semiconductor device including a device isolation layer disposed in a substrate and defining an active region, a first conductive pattern on the active region, an impurity region in the active region on a side of the first conductive pattern, a second conductive pattern on the active region between the impurity region and the first conductive pattern, a first spacer between the first conductive pattern and the second conductive pattern, and a contact plug disposed on and electrically connected to the first conductive pattern may be provided. The second conductive pattern may have a width less than a width of the contact plug.

High voltage semiconductor devices including main conductive pattern, auxiliary conductive pattern, and spacer therebetween

A semiconductor device includes capacitors connected in parallel. Electrode active portions and a discharge active portion are defined on a semiconductor substrate, and capping electrodes are disposed respectively on the electrode active portions. A capacitor-dielectric layer is disposed between each of the capping electrodes and each of the electrode active portions that overlap each other. A counter doped region is disposed in the discharge active portion. A lower interlayer dielectric covers the entire surface of the semiconductor substrate. Electrode contact plugs respectively contact the capping electrodes through the lower interlayer dielectric, and a discharge contact plug contacts the counter doped region through the lower interlayer dielectric. A lower interconnection is disposed on the lower interlayer dielectric and contacts the electrode contact plugs and the discharge contact plug.

Growing community of inventors

Hwaseong-si, South Korea

Myoungsoo Kim