Skhynix Inc.

Myoung Seo Kim

Seung Yong Lee

Eui Cheol Lim

Young Pyo Joo

Jae Hoon Kim

Sung Woo Hyun

Choung Ki Song

Hyeong Tak Ji

Mi Seon Han

An arithmetic device includes a multiplying-accumulating (MAC) operator and an activation function (AF) circuit. The MAC operator performs a MAC arithmetic operation for weight data and vector data to generate an arithmetic result signal. The AF circuit stores a look-up table for an activation function, adjusts a number of logic level combinations of an input distribution signal that correspond to each logic level combination of the output distribution signal, among a plurality of logic level combinations of the output distribution signal, based on an input range of the activation function. The AF circuit selects and outputs the output distribution signal that corresponds to the input distribution signal based on the look-up table. The input range of the activation function is based on a relative number of errors that occur.

Arithmetic devices for neural network

A memory module may include J memory chips configured to input/output data in response to each of a plurality of translated address signals; and an address remapping circuit configured to generate a plurality of preliminary translated address signals by adding first correction values to a target address signal provided from an exterior of the memory module, and to generate the plurality of translated address signals by shifting all bits of each of the plurality of preliminary translated address signals so that K bits included in a bit string of each of the plurality of preliminary translated address signals are moved to other positions of each bit string.

Semiconductor memory apparatus, memory module, and memory system including memory module

A DIMM (Dual In-line Memory Module) may include: one or more volatile memories, a nonvolatile memory having a first area where a reference parameter value which is expected to reduce the life expectancy of the volatile memory by a preset range or more, is stored and a second area where an excess counting value is stored, and a control circuit suitable for measuring an operation parameter value of the volatile memory, generating the excess counting value by counting the number of times that the operation parameter value exceeds the reference parameter value, and outputting the excess counting value stored in the second area to the outside through a preset pin in a preset operation mode.

Dual in-line memory module and operating method thereof

A memory system includes: a main memory device configured to include a plurality of row lines; a cache memory device configured to include a plurality of cache lines for caching data stored in the row lines, each cache line including cache data, a row hammer state value for storing an access number of a corresponding row line, and an access selection bit set according to the row hammer state value; and a memory controller configured to control an access operation to be performed on one of the main memory device and the cache memory device, which is selected according to the access selection bit of a cache-hit cache line, in response to a request from a host.

Memory system and operating method thereof

A storage device can be designed to reduce latency in a read operation. Such a storage device can include: a memory device including a plurality of pages that include a first page and a second page different from the first page, each page including a plurality of memory cells that are configured to store data; and a memory controller in communication with the memory device and for sequentially storing result values of a function with respect to a plurality of input values in the plurality of memory cells, and controlling the memory device to store a result value in a last area of the first page and a start area of the second page.

Storage device and operating method thereof

A cooling system for efficiently cooling large-scale data storage devices embedded in a vehicle, and a smart vehicle including the same are disclosed. The storage device cooling system includes a storage housing section located at a ceiling-mounted structure of a vehicle, provided with an indoor space thereof in which a plurality of storage devices is kept and an opening/closing device configured to open or close the indoor space, a sensing circuit configured to detect a temperature of the indoor space, and an opening/closing controller configured to control operations of the opening/closing device in response to the temperature detected by the sensing circuit.

System for cooling storage device and smart vehicle including the same

A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes a plurality of memory regions, each memory region including a plurality of cells commonly coupled to a word line. The controller generates a plurality of candidate data sets based on source data, determines a number of vulnerable cells corresponding to each of the plurality of candidate data sets, and stores a candidate data set having a smallest number of vulnerable cells into a target memory region among the plurality of memory regions.

A memory module may include: a plurality of stacked memory chips; a memory controller; and an interposer connected between the plurality of memory chips and the memory controller.

Memory module and data processing system for reducing heat generation

A semiconductor apparatus may include: a pad unit including a plurality of pads; a memory cell array coupled to the pad unit through input/output signal lines; and a pad configuration control circuit configured to change a pad configuration of the pad unit by dividing the plurality of pads into a plurality of groups and setting the plurality of groups to different modes, respectively.

Growing community of inventors

Gyeonggi-do, South Korea

Myoung Seo Kim