Samsung Electronics Co., Ltd.

Myoung-Hee Han

Young-Hoon Park

Yun-Jae Lee

Ju-Wan Kim

Man-Jong Yu

Joon-Mo Kwon

Hyo-Dong Ban

Won-Mo Park

Ju-bum Lee

Won-Hee Jang

Seung-Beom Kim

Eun-Young Min

Jong-Seop Lee

Jin-Hun Lee

A semiconductor device having increased reliability includes a fuse region and a monitoring region. Fuses are located on an insulation film in the fuse region and are exposed through fuse windows. A monitoring pattern is located on the insulation film in the monitoring region. The monitoring pattern includes sub-patterns that are exposed through a monitoring window.

Semiconductor device and method of fabricating the same

In an embodiment, a semiconductor device includes a first fuse cutting portion in which fuse lines are arranged transversely adjacent to each other, a first runner portion in which runner lines connected to the fuse lines are arranged transversely adjacent to each other but at smaller intervals than those of the fuse lines, and a first connection portion having connection lines between the fuse lines and the runner lines. An insulating barrier layer covers the connection portions so that post-process residues from fuse cutting do not cause electrical shorts between the closely formed runner lines.

Semiconductor device comprising fuse sections

Disclosed herein is a method of forming a reliable high performance capacitor using an isotropic etching process to optimize the surface area of the lower electrodes while preventing an electrical bridge from forming between the lower electrodes. This method includes multiple sacrificial oxide layers that are formed over a substrate, an insulating layer with contact plugs, and an etch stopping layer. The sacrificial oxide layers are patterned and additionally isotropically etched to form an expanded capacitor hole. An exposed portion of the etch stopping layer is then etched to form a final capacitor hole exposing an upper portion of the contact plug and a portion of the insulating layer adjacent thereto. The semiconductor substrate having the final capacitor hole is cleaned to remove a native oxide film on the exposed upper portion of the contact plug.

Method of forming a reliable high performance capacitor using an isotropic etching process

A semiconductor memory device for reducing parasitic bit line capacitance and a method of fabricating the same are provided. The semiconductor memory device includes a conductive pad formed on a semiconductor substrate and a first interlayer insulating layer having a first contact hole that exposes the conductive pad. The first interlayer insulating layer is formed on the conductive pad and the semiconductor substrate. Bit line stacks are formed on the first interlayer insulating layer. Bit line spacers are formed from a combination of materials having different dielectric constants on the sidewalls of the bit line stack to reduce the parasitic bit line capacitance. Preferably, the bit line spacers are stack layers including silicon nitride, silicon oxide, and silicon nitride. A second interlayer insulating layer having a second contact hole is formed on the bit line stack. A conductive plug fills the first and second contact holes. A storage electrode of a capacitor is formed on the conductive plug to be connected to the conductive pad.

Semiconductor memory device for reducing parasitic bit line capacitance and method of fabricating the same

A contact forming method of a semiconductor device is disclosed, in which a pad polysilicon layer is formed at an active region of a cell array, thereafter an upper portion of a gate is opened when a spacer of a NMOS transistor region is formed. And at the same time a gate capping insulating layer of the cell array region, the active region of the NMOS transistor and the gate node contact region remains at a predetermined thickness by etching the spacer. And then, by performing an ion implantation procedure on the entire surface, the direct pad polysilicon layer and the buried pad polysilicon layer are simultaneously ion-implanted.

Contact forming method for semiconductor device

Growing community of inventors

Gyeonggi-do, South Korea

Myoung-Hee Han