Broadcom Corporation

Myles H Wakayama

Pieter Vorenkamp

Michael Q Le

Ramon Alejandro Gomez

Howard A Baumer

Xicheng Jiang

Avanindra Madisetti

Aaron W Buchwald

Hui Wang

Jurgen Van Engelen

Lawrence M Burns

Chun-Ying Chen

Frank Carr

Siavash Fallahi

Oscar Ernesto Agazzi

Steven T Jaffe

Kevin Tunghai Chan

Gottfried Ungerboeck

Peter R Kinget

Keshab K Parhi

Donald George McMullin

Young J Shin

James Y C Chang

Kwang Young Kim

Arnoldus Venes

Thinh Cat Nguyen

Alexandre Rudolph Kral

Afshin Mellati

Stephen A Jantzi

David S P Ho

Iconomos A Koullias

Dana Vincent Laub

Christian Lutkemeyer

Jennifer Chiao

Gary A Alvstad

Daniel J Marz

Hsiang-Bin Lee

Josephus Van Engelen

Luke Thomas Steigerwald

Ron Lipka

Ka Wai Tong

Patrick Pai

Yee Ling “Felix” Cheung

Yee Ling Felix Cheung

David SP Ho

James YC Chang

Young Joon Shin

An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Digital IF demodulator for video applications

Various systems and methods related to equalization precoding in a communications channel are disclosed. In one implementation precoding is performed on signals transmitted over an optical channel. In one implementation precoding and decoding operations are performed in parallel to facilitate high speed processing in relatively low cost circuits. Initialization of the precoders may be realized by transmitting information related to the characteristics of the channel between transceiver pairs.

System and method for high speed communications using digital signal processing

A phase lock loop frequency synthesizer includes a phase rotator in the feedback path of the PLL. The PLL includes a phase detector, a low pass filter, a charge pump, a voltage controlled oscillator ('VCO'), and a feedback path connecting output of the VCO to the phase detector. The feedback path includes a phase rotator connected to the output of the VCO and to an input of a frequency divider. Coarse frequency control is implemented by adjusting the input reference frequency to the phase detector or by adjusting the divider ratio of the frequency divider. Fine frequency control is achieved by increasing or decreasing the rotation speed of the phase rotator. The phase rotator constantly rotates phase of the VCO output, thereby causing a frequency shift at the output of the phase rotator.

Phase-interpolator based PLL frequency synthesizer

An apparatus and method for local oscillator calibration compensates for filter passband variation in a mixer circuit, such as a receiver circuit. The receiver includes at least a mixer circuit and a filter coupled to the output of the mixer. During operation, the mixer mixes an RF input signal with a first local oscillator (LO) signal to frequency translate a selected channel in the RF input signal into the passband of the filter. During a calibration mode, the RF input signal is disabled, and the first LO signal is injected into the filter input by leaking the first LO signal through the mixer circuit. The frequency of the LO signal is then swept over a frequency bandwidth that is sufficiently wide so that the actual passband is detected by measuring the signal amplitude at the output of the bandpass filter, thereby determining any variation in the passband of the filter from the expected passband. Once the actual passband is determined, then the frequency of the first local oscillator signal is adjusted or tuned to compensate for any frequency shift of the actual passband compared to the expected passband. Therefore, the selected channel is up-converted into the center of the actual passband of the bandpass filter and will not fall outside the passband. This enables the passband of the bandpass filter to be narrowed, as compared with conventional receivers that do not utilize this calibration procedure. For example, the bandpass filter can be narrowed to one or two channels wide.

Apparatus and method for local oscillator calibration in mixer circuits

Various systems and methods related to equalization precoding in a communications channel are disclosed. In one implementation preceding is performed on signals transmitted over an optical channel. In one implementation preceding and decoding operations are performed in parallel to facilitate high speed processing in relatively low cost circuits. Initialization of the precoders may be realized by transmitting information related to the characteristics of the channel between transceiver pairs.

A dual conversion receiver selects and down-converts one channel from a plurality of channels in a received RF signal. The dual conversion receiver includes first and second mixer stages that are driven by first and second local oscillator signals. Channel selection is performed by tuning the first local oscillator signal so that a desired channel is up-converted to a first IF frequency, which defines the center of the passband of a first bandpass filter connected between the first and second mixer stages. The second mixer stage down-converts the output of the first bandpass filter to a second IF frequency, which is further filtered by a second bandpass filter. The first and second local oscillators can produce harmonics that mix in the second mixer stage, causing unwanted spurious signals that can fall in band with the second IF frequency. In order to avoid interference from these unwanted spurious signals, the frequency step size of the first local oscillator is tuned so that the spurious signals fall out-of-band of the second IF frequency.

Dual conversion receiver with reduced harmonic interference

A DC compensation circuit restores the frequency spectrum of an input signal at DC (or 0 Hz) by removing or reducing DC offset, 1/f noise, or any other unwanted noise at or near 0 Hz. The DC compensation is performed using direct coupling, as opposed to AC coupling, so that no useful signal information in the active period of the input signal is lost at DC. The DC compensation circuit samples the input signal during an inactive period of the input signal. Afterwhich, the unwanted DC noise is determined from the sampled signal and stored until an active period of the input signal. For example, the sampled signal can be filtered using a passband around DC so as to isolate the signal energy at DC during the inactive period. Since there is no useful signal information present during the inactive period, any signal energy at the output of the filter is necessarily unwanted DC noise. In a feed-forward approach, the unwanted DC noise is then subtracted from the input signal during the active period of the input signal to compensate or cancel the unwanted DC noise. Alternatively, the unwanted DC noise could be sampled and determined during the inactive period and then fed back (after filtering) in order to be subtracted during the active period of the input signal.

Apparatus and method for restoring DC spectrum for analog television reception using direct conversion tuners

A direct conversion satellite tuner is fully integrated on a common substrate. The integrated tuner receives an RF signal having a plurality of channels and down-converts a selected channel directly to baseband for further processing. The integrated tuner includes on-chip local oscillator generation, tunable baseband filters, and DC Offset cancellation. The integrated tuner can be implemented in a completely differential I/Q configuration for improved electrical performance. The entire direct conversion satellite tuner can be fabricated on a single semiconductor substrate using standard CMOS processing, with minimal off-chip components. The tuner configuration described herein is not limited to processing TV signals, and can be utilized to down-convert other RF signals to an IF frequency or baseband.

Integrated direct conversion satellite tuner

A low jitter, high phase resolution phase lock loop incorporating a ring oscillator-type VCO is designed and constructed to operate at a characteristic frequency M times higher than a required output clock frequency. Multi-phase output signals are taken from the VCO and selected through a Gray code MUX, prior to being divided down to the output clock frequency by a divide-by-M frequency divider circuit. Operating the VCO at frequencies in excess of the output clock frequency, allows jitter to be averaged across a timing cycle M and further allows a reduction in the number of output phase taps, by a scale factor M, without reducing the phase resolution or granularity of the output signal.

Low jitter high phase resolution PLL-based timing recovery system

A predictive time base generator having predictive synchronizer and replica delay element coupled with the synchronizer feedback delay loop. The predictive time base generator receives a clock signal delayed by a predetermined clock delay and produces a predictive time signal advanced in time by an amount represented by the replica delay element. The replica delay element can replicate one or both of a predetermined clock delay and a predetermined data delay, substantially nullifying the respective delays in critical signal paths of a device. The replica delay element can include replicas of structure(s) found in an incoming clock path and an outgoing data path, such elements including, for example, voltage level shifters, buffers or data latches, multiplexers, wire element models, and the like. A predictive computer bus interface adapter which incorporates the aforementioned predictive time base generator also is provided. Such a predictive interface adapter can be adapted to be observant of stringent bus protocol timing budgets imposed under the PCI and PCI-X local bus protocol, and to be robust relative to variations in design and fabrication processes, and environmental operating conditions.

Multiprotocol computer bus interface adapter and method

Apparatus and method for restoring DC spectrum for analog television reception using direct conversion turners

A phase lock loop frequency synthesizer includes a phase rotator in the feedback path of the PLL. The PLL includes a phase detector, a low pass filter, a charge pump, a voltage controlled oscillator ('VCO'), and a feed back path connecting output of the VCO to the phase detector. The feedback path includes a phase rotator connected to the output of the VCO and to an input of a frequency divider. Coarse frequency control is implemented by adjusting the input reference frequency to the phase detector or by adjusting the divider ratio of the frequency divider. Fine frequency control is achieved by increasing or decreasing the rotation speed of the phase rotator. The phase rotator constantly rotates phase of the VCO output, thereby causing a frequency shift at the output of the phase rotator. The rotation speed of the phase rotator is controlled by an accumulator and a digital frequency control word. Any high frequency noise generated by the phase rotator is rejected by the PLL by properly setting the PLL bandwidth so that the noise falls outside the bandwidth of the PLL. Therefore, a low noise synthesized output from the VCO is generated.

Growing community of inventors

Laguna Niguel, CA, United States of America

Myles H Wakayama