Qualcomm Incorporated

Myil Ramkumar

Bohuslav Rychlik

Christopher E Koob

Jaya Prakash Subramaniam Ganasan

George Patsilaras

Serag Gadelrab

Dipti Ranjan Pal

Aris Balatsos

Jason Edward Podaima

Steven Halter

Paul Christopher John Wiercienski

Simon Booth

Sean Sweeney

Manokanthan Somasundaram

Sina Dena

Johnny Jone Wai Kuan

Christophe Denis Bernard Avoinne

Bhupinder Singh Pabla

Methods and systems are disclosed for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network. An aspect includes transmitting, from a DVM initiator to a DVM network, a DVM operation, broadcasting, by the DVM network to a plurality of DVM targets, the DVM operation, and, based on the DVM operation being broadcasted to the plurality of DVM targets by the DVM network, performing one or more hardware optimizations comprising: turning on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation, increasing a frequency of the clock domain, turning on a power domain coupled to the DVM target based on the power domain being turned off, or terminating the DVM operation to the DVM target based on the DVM target being turned off.

Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks

Systems and methods relate to managing shared resources in a multithreaded processor comprising two or more processing threads. Danger levels for the two or more threads are determined, wherein the danger level of a thread is based on a potential failure of the thread to meet a deadline due to unavailability of a shared resource. Priority levels associated with the two or more threads are also determined, wherein the priority level is higher for a thread whose failure to meet a deadline is unacceptable and the priority level is lower for a thread whose failure to meet a deadline is acceptable. The two or more threads are scheduled based at least on the determined danger levels for the two or more threads and priority levels associated with the two or more threads.

Bandwidth/resource management for multithreaded processors

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Richmond Hill, Canada

Myil Ramkumar