Samsung Electronics Co., Ltd.

Myeongwhan Hyun

Jiwoong Kim

Moonki Jang

Yunhwan Kim

A memory device includes a row decoder that receives one or more normal addresses and one or more control addresses, and a memory cell array connected to the row decoder via a plurality of word lines. In a normal operation, in response to receiving the one or more normal addresses, any one word line among the plurality of word lines is enabled. In an initialization operation, in response to receiving the one or more normal addresses and the one or more control addresses, at least two word lines among the plurality of word lines are enabled. Data of memory cells of the memory cell array connected to the enabled at least two word lines is initialized.

Growing community of inventors

Suwon-si, South Korea

Myeongwhan Hyun