Samsung Sdi Co., Inc.

Samsung Mobile Display Co., Ltd.

Samsung Display Co., Ltd.

Myeong-Seob So

Byoung-Deog Choi

Jae-Bon Koo

Won-Sik Kim

Jun-Hyung Kim

Min-Chul Suh

Jin-sung Kim

Byoung-Keon Park

Nam-Choul Yang

Jin-Sung Kim

Nam-Sung Jung

Kazuhiro Ito

Jae-Yeol Kim

A thin film transistor of the present invention comprises, an active layer formed on an insulating substrate and having a channel region and source/drain regions; a gate electrode formed corresponding to the channel region of the active region; a body contact region separately formed with the source/drain regions in the active layer; source/drain electrodes each connected to the source/drain regions; and a conductive wiring for connecting the body contact region and the gate electrode.

Thin film transistor

A thin film transistor (TFT), a method of fabricating the same, and a display device including the TFT, are provided. In the TFT, a channel region is connected to a gate electrode so that the influence of a substrate bias is reduced or eliminated. Thus, the threshold voltage of the TFT is reduced, a subthreshold slope can be improved, and a large drain current can be obtained at a low gate voltage.

Thin film transistor, method of fabricating the same, and a display device including the thin film transistor

Provided are a thin film transistor, a method for preparing the same and a flat panel display employing the same. The thin film transistor includes a gate electrode, source and drain electrodes insulated from the gate electrode, a semiconductor layer insulated from the gate electrode and electrically connected to the source and drain electrodes, an insulating layer, and a carrier blocking layer interposed between the semiconductor layer and the insulating layer and preventing electrons or holes moving through semiconductor layer from being trapped in the insulating layer. Since the thin film transistor is constructed such that the carrier blocking layer is interposed between the semiconductor layer and the insulating layer, the electrons or holes injected into the semiconductor layer can be prevented from being trapped in the insulating layer, thereby suppressing hysteresis characteristic. In addition, a reliable flat panel display device can be manufactured using the thin film transistor.

Thin film transistor, a method for preparing the same and a flat panel display employing the same

A TFT including a gate metallic layer, a body layer doped with a dopant having a first polarity, a source layer and a drain layer doped with a dopant having a second polarity, a semiconductor layer formed between the source layer and the drain layer, and a contact coupling the gate metallic layer and the body layer.

Gate shorted to body thin film transistor, manufacturing method thereof, and display including the same

A PDP address driver circuit includes: an inductor coupled to a conductive pattern. A first current applier applyies a current of a first direction to the inductor and the conductive pattern while sustaining a panel capacitor at an address voltage. A discharger generates a resonance between the inductor and the panel capacitor to discharge the panel capacitor to 0V, while the current of the first direction flows to the inductor and the conductive pattern. A second current applier applyies a current of a second direction to the inductor and the conductive pattern while sustaining the panel capacitor at 0V. A charger generates a resonance between the inductor and the panel capacitor to charge the panel capacitor to the address voltage, while the current of the second direction flows to the inductor and the conductive pattern.

Plasma display panel and apparatus and method for driving the same

An apparatus for driving a plasma display panel that includes first and second signal lines for supplying first and second voltages, respectively, and first and second inductors coupled to one terminal of a panel capacitor. A first current path is formed from the panel capacitor to the second signal line via the second inductor to drop the voltage of the panel capacitor from the first voltage to the second voltage. A second current path is formed to recover the current flowing to the second inductor towards the first signal line, while the voltage of the panel capacitor is sustained at the second voltage. A third current path is formed from the first signal line to the panel capacitor via the first inductor while the current flowing to the second inductor is recovered, to raise the voltage of the panel capacitor from the second voltage to the first voltage. A fourth current is also formed to recover the current flowing to the first inductor towards the first signal line, while the voltage of the panel capacitor is sustained at the first voltage.

Growing community of inventors

Cheonan-si, South Korea

Myeong-Seob So