Skhynix Inc.

University of Illinois

Myeong Joon Kang

Hyung Jin Lim

Miseon Han

Jongryool Kim

Jian Huang

Jong Ryool Kim

Chang Hwan Youn

Luyi Kang

Suchang Kim

Xiaohao Wang

Pui York Wong

A data storage device includes a nonvolatile memory device, a volatile memory device, a data encryption circuit configured to encrypt data outputted from the nonvolatile memory device, a data decryption circuit configured to decrypt encrypted data output from the data encryption circuit and configured to provide the decrypted data to the volatile memory device, and a processor configured to perform a first process that controls installation of a first in-storage program in the data storage device, a second process configured to manage a mapping table storing a relation between a logical address and a physical address of the nonvolatile memory device, and a third process configured to execute the first in-storage program.

Data storage device performing in-storage processing

A heterogeneous memory system includes a memory device including first and second memories and a controller including a cache. The controller identifies memory access addresses among addresses for memory regions of the memory device; track, for a set period, a number of memory accesses for each memory access address; classify each memory access address into a frequently accessed address or a normal accessed address based on the number of memory accesses in the set period; and allocate the first memory for frequently accessed data associated with the frequently accessed address and the second memory for normal data associated with the normal accessed address.

Data tiering in heterogeneous memory system

A host handles reliability management of memory systems. The host analyzes characteristics of data associated with a select memory system among the memory systems. The host determines a reliability control mode and one or more reliability schemes among reliability schemes to be applied to the select memory system based on the characteristics. The host provides reliability management information indicating the reliability control mode to the select memory system. The plurality of reliability schemes includes error correction code (ECC), read retry, intra redundancy and refresh schemes.

Data processing system including host with reliability management of memory systems and method for the same

Growing community of inventors

San Jose, CA, United States of America

Myeong Joon Kang