Db Hitek Co., Ltd.

Myeong Bum Pyun

Won Kook Cho

Yong Sin Han

Ji Eun Lee

Jae Hyun Lee

Jin Young Goh

Min Gi Jo

Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, the superjunction semiconductor device includes at least one body region in a second corner region extending along the length direction in the same manner as a pillar, thereby promoting smooth current flow in a transition corner region and thus improving reverse recovery characteristics; and a method of manufacturing the superjunction semiconductor device.

Superjunction semiconductor device and method of manufacturing same

Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, a superjunction semiconductor device and a method of manufacturing the same include an additional structure that enables smooth current flow in a transition region and/or a ring region of the device, where the current concentrates locally during turn-on/turn-off operations of the device due to insufficient current paths compared to the cell region of the device, thereby improving reverse recovery characteristics and preventing device destruction.

Disclosed is a superjunction semiconductor device () and a method for manufacturing the same and, more particularly, to a superjunction semiconductor device () and a method for manufacturing the same seeking to improve breakdown voltage characteristics of the device by effectively dispersing a lateral electric field in a ring region R in the lower portion of an epitaxial layer by forming first conductivity type floating impurity-doped regions in the lower portion of the epitaxial layer in the ring region R under a p-rich condition.

Superjunction semiconductor device and method for manufacturing same

A superjunction semiconductor device with an epitaxial layer having different effective thicknesses and a method of manufacturing the same are disclosed. The superjunction semiconductor device includes an epitaxial layer having different thicknesses in a cell region and a ring region to decrease a breakdown voltage of the cell region relative to a breakdown voltage of the ring region so as to reveal a characteristic of the breakdown voltage of the cell region.

Superjunction semiconductor device with different effective epitaxial layer thicknesses

A superjunction semiconductor device having a reduced source area and a method of manufacturing the same and, more particularly, to a semiconductor device and a method of manufacturing the same, in which the semiconductor device realizes a reduction in the area of a source in a body region to reduce the current during a short circuit fault, thus delaying a temperature increase and increasing the time before temperature-related device destruction.

Superjunction semiconductor device having reduced source area

Disclosed are a superjunction semiconductor device and a method of manufacturing the same. More particularly, the present disclosure relates to a superjunction semiconductor device and a method of manufacturing the same, in which the device includes a field oxide layer having an uppermost end or surface that is higher than that of a gate oxide layer, between a gate electrode and a second pillar region in a cell region. This enables a reduction in gate-drain parasitic capacitance, thereby increasing switching speed and reducing switching loss.

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Incheon, South Korea

Myeong Bum Pyun