Samsung Electronics Co., Ltd.

Seoul National University

Muyoung Kim

Hyungwoo Lee

Byunghoon Lee

Changyoung Jeong

Junghwan Moon

Maenghyo Cho

Sungwoo Park

Byunggook Kim

Joonmyung Choi

There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.

Lithography method using multi-scale simulation, semiconductor device manufacturing method and exposure equipment

A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.

Lithography method using multiscale simulation, and method of manufacturing semiconductor device and exposure equipment based on the lithography method

Growing community of inventors

Seoul, South Korea

Muyoung Kim