Nec Corporation

Hitachi, Ltd.

National Institute of Advanced Industrial Science and Technology

International Superconductivity Technology Center

International Superconductivity Technology Center, the Judicial Foundation

Mutsuo Hidaka

Keiichi Tanabe

Kenji Hinode

Shuichi Nagasawa

Shuichi Tahara

Masaaki Maezawa

Shuuichi Nagasawa

Yoshihiro Kitagawa

A quantum bit device according to the present invention includes a first quantum bit substratewhich includes a first superconductive wiringdisposed to have a magnetically coupled portion with a first superconductive magnetic flux quantum biton a surface thereof, a second quantum bit substratewhich includes a second superconductive wiringdisposed to have a magnetically coupled portion with a second superconductive magnetic flux quantum biton a surface thereof, and a base substratewhich includes a third superconductive wiringconfigured by two superconductive wirings extending parallel to each other on a surface thereof. The first and second quantum bit substrates are placed on the base substrate, two end portions of the first superconductive wiring and two end portions on one side of the third superconductive wiring are joined via superconductive solders, two end portions of the second superconductive wiring and two end portions on the other side of the third superconductive wiring are joined via superconductive solders, and three of the first to third superconductive wirings form one continuous superconductive loop.

Quantum bit device

In a superconducting random access memory according to this invention, drive lines such as a word line and a bit line, and a sense line for accessing a memory cell array are each divided into a plurality of blocks and an in-block signal propagation circuit having a level-logic drive circuit and sense circuit each with high load drive capability is used for signal propagation in each of the blocks. Further, for long-distance signal propagation between the blocks, superconducting passive transmission lines formed by single flux quantum (SFQ) devices and capable of high-speed operation are used. As a result, the high-speed operation as a whole is enabled. It is possible to additionally use splitters or confluence buffers and latch circuits and, further, a binary tree structure may be adopted.

Method of configuring superconducting random access memory, device structure of the same, and superconducting drive circuit

To provide a planarization method which does not depend upon the size and the density of a wiring pattern and in which a reliable wiring system and a Josephson device can be formed and wiring structure, an insulation layer is planarized by forming a reversal pattern mask of wiring and selectively removing the insulation layer on the wiring.

Manufacturing method for electronic device and multiple layer circuits thereof

In a sampler for use in measuring a waveform of an electric signal, a measurement target current is given as the electric signal to a sampler chipand is also used to produce a trigger current Itr for determining measurement timing on the sampler chip. A comparatorcompares a sum of a feedback current, a current derived from the measurement target current, and the trigger current Itr with a threshold value to produce an SFQ pulse when the sum exceeds the threshold value. The SFQ pulse produced by the comparator is observed or counted for a predetermined duration to measure the waveform of the electric signal.

Sampler and method of measuring a waveform of a current with jitters reduced

A superconducting current measuring circuit is provided with a detection loop through which a current flows by the influence of a magnetic field generated by a measurement target current. The detection loop contains a superconductor. The superconducting current measuring circuit is also provided with a superconducting sampler circuit for measuring the current flowing through the detection loop.

Superconducting current measuring circuit having detection loop

In a superconducting contact structure between an oxide superconductor and a metal superconductor, the oxide superconductor has a recess in a surface which is in contact with the metal superconductor.

Growing community of inventors

Tsukuba, Japan

Mutsuo Hidaka