Texas Instruments Corporation

Muthusubramanian Venkateswaran

Preetam Tadeparthy

Vikram Gakhar

Preetam Charan Anand Tadeparthy

Vikas Lakhanpal

Dattatreya Baragur Suryanarayana

Kushal D Murthy

Kuang-Yao Cheng

Naman Bafna

Rohit Narula

Vishnuvardhan Reddy J

Siddaram Mathapathi

Sudeep Banerji

Mayank Jain

Manish Parmar

Venkatesh Wadeyar

Pamidi Ramasiddaiah

Bikash Kumar Pradhan

Vinod J Menezes

Divya Kaur

Rajesh Venugopal

Matthew John Ascher Schurmann

Vibha Goenka

Anindita Borah

In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

Power converter control with programmable blanking time

A controller includes: a pulse-width modulation (PWM) circuit; a control loop; and a reference voltage controller. The control loop has: a feedback input adapted to be coupled to an output voltage of a power stage; a control loop output coupled to a PWM control input; and an operational amplifier with a first feedback input, a first reference input, and an amplifier output, the first feedback input connected to the feedback input, and the amplifier output coupled to the PWM control input. The reference voltage controller has a reference voltage output coupled to the first reference input, the reference voltage controller configured to adjust a reference voltage provided to the reference voltage output responsive to a dynamic error estimate based on error in the operational amplifier.

Switching converter control loop and dynamic reference voltage adjustment

A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.

Switching converter with pulse truncation control

A multiphase controller includes an integrator enable terminal, a pulse width modulator, an error integrator, an open drain driver, and an integrator enable circuit. The integrator enable terminal is adapted to be coupled to the integrator enable terminal of a different instance of the multiphase controller. The pulse width modulator is configured to modulate a power stage. The error integrator is configured to control the pulse width modulator. The open drain driver is coupled to the integrator enable circuit. The integrator enable circuit is coupled to the pulse width modulator, the error integrator, the open drain driver, and the integrator enable terminal. The integrator enable circuit is configured to activate the open drain driver responsive to generation of a power stage control pulse by the pulse width modulator, and activate the error integrator responsive to a logic low signal at the integrator enable terminal.

Multiphase controller communication

In described examples, a circuit includes a switch. The switch includes first transistors and second transistors. A voltage generation circuit is coupled to the switch. A level shifter is coupled to the voltage generation circuit and is configured to receive a control signal. A logic unit is coupled to the level shifter and the voltage generation circuit. The logic unit is configured to generate a secondary signal. The first transistors are configured to receive the control signal, and the second transistors are configured to receive the secondary signal.

Fail-safe switch for multidomain systems

Multi-mode power converter with programmable control

A power stage controller includes: a multi-phase pulse control circuit; a current sense circuit; a comparator; an error amplifier; and a mode controller. The mode controller includes a mode controller input and a summation circuit. The summation circuit has a first summation circuit input, a second summation circuit input and a summation circuit output, the first summation circuit input is coupled to the error amplifier output, and the summation circuit output is coupled to the first comparator input. The mode controller is configured to: select one of a main controller mode or a secondary controller mode responsive to a mode control voltage at the mode controller input; bypass the summation circuit responsive to selection of the main controller mode; and enable the summation circuit responsive to selection of the secondary controller mode.

Stackable multi-phase power stage controller with current matching

In at least some examples, an integrated circuit includes an input pin and an analog-to-digital converter (ADC) comprising an input terminal coupled to the input pin and an output terminal. The integrated circuit further includes a logic circuit comprising an input terminal coupled to the output terminal of the ADC, a first output terminal, and a second output terminal. The integrated circuit further includes a resistance circuit. In an example, the resistance circuit includes a resistor coupled between the input pin and a first node, a first switch coupled between the first node and a reference voltage pin, and a second switch coupled between the first node and a ground pin.

Pinstrap detection circuit

A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.

Fully differential current sensing

A circuit includes a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code. The circuit also includes a second voltage divider having a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs, and a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs. The circuit also includes a third voltage divider having a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs, and a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.

Multi-output digital to analog converter

A control circuit for a DC-DC converter and a DC-DC converter are disclosed. The control circuit includes an integrator coupled to receive a first reference voltage and a first voltage that includes an output voltage for the DC-DC converter and to provide an integrated error signal. A first comparator is coupled to receive the first reference voltage and the first voltage and to provide a dynamic-integration signal that adjusts the integration time constant of the integrator.

Power converter with reduced undershoot and overshoot during load transients

In a described example, a method includes using a power supply, supplying an output voltage that varies in response to a reference voltage; detecting a voltage ramp in an input reference voltage; generating an offset voltage waveform; adding the offset voltage waveform to the input reference voltage to generate a second reference voltage; and using the second reference voltage, operating the power supply to supply the output voltage.

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Bengaluru, India

Muthusubramanian Venkateswaran