Avalon Microelectronics, Inc.

Altera Canada Co.

Mutema John Pittman

Wally Haas

Chuck Rumbolt

The present invention discloses a method and apparatus for addressing the issue of clock skew in a data signal while making efficient use of space on an integrated chip (IC) by utilizing a physical delay line controlled by a state machine in conjunction with pre-requisite chip architecture. The pre-requisite chip architecture samples the incoming data signal in response to a clocking signal input from the physical delay line; the physical delay line responds to commands from the state machine to increment the delay of the physical delay line to produce samples which describe the incoming data signal and delineate its data valid window.

Method and apparatus for deskewing data transmissions

An apparatus for determining the amount of skew to be injected into a high-speed data communications system of including a plurality of lanes having a data bus per lane, relative to a reference lane, for system skew compensation. By knowing the relative amount of skew that each lane requires for alignment, an appropriate amount of skew can be injected on each lane to provide alignment and thus compliancy with the SFI-5 and SxI-5 standards, in terms of data skew specifications. The relative skew amounts for each transmitting lane are determined using a methodology involving internal loopback and characteristics from a connected communications element to the chip receive path.

Skew-correcting apparatus using external communications element

An apparatus for determining the amount of skew injected into a high-speed data communications system, including a plurality of lanes having a data bus per lane, relative to a reference lane, for system skew compensation. By knowing the relative amount of skew that each lane requires for alignment, an appropriate amount of skew is then injected on each lane to provide alignment and thus compliancy with the SFI-5 and SxI-5 standards, in terms of data skew specifications. The relative skew amounts for each transmitting lane are determined using dual loopback methods.

Skew-correcting apparatus using dual loopback

An apparatus for determining the amount of skew to be injected for system skew compensation in a high-speed data communications system including a plurality of lanes with a data bus per lane. Such skew compensation is necessary due to inherent system skew. By iterating through the possible intervals within the maximum expected skew search space, the correct combination of search space intervals for all lanes can be determined to provide alignment and thus compliancy with relevant standards, such as the SFI-5 and SxI-5 standards, in terms of data skew specifications.

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St. John's, Canada

Mutema John Pittman