Nxp B.v.

Mustafa Acar

Mark Pieter Van Der Heijden

Antonius Hendrikus Jozef Kamphuis

Paul Mattheijssen

Dominicus Martinus Wilhelmus Leenaerts

Bram Nauta

Jan Willem Bergman

Philipp Franz Freidl

Jan Sophia Vromans

Melina Apostolidou

Rajesh Mandamparambil

Katarzyna Nowak

Jawad Hussain Qureshi

Lucas Maria Florentinus De Maaijer

Olivier Tesson

Xin Yang

Amar Ashok Mavinkurve

Marcellinus Johannes Maria Geurts

Andrei-Alexandru Damian

Robin Wesson

Danny Wayling Chang

Konstantinos Giannakidis

Zhe Chen

Erik Daniel Björk

Koen Buisman

Leo De Vreede

Dominicus M W Leenaerts

One example discloses an on-chip shielded device, including: a planar structure including a substrate and a passivation layer; an electrical component formed within the substrate and coupled to an input signal path and an output signal path; a first shielding element positioned above the electrical component and the passivation layer; and a second shielding element positioned above the electrical component, the passivation layer and the first shielding element.

On-chip shielded device

A circuit includes a common terminal, a first terminal, and a second terminal. The common terminal is coupled to first and second circuit branches at a branch node. The first and second circuit branches include a first and second quarter wavelength transmission line having a first end coupled to the branch node and a second end coupled to the first and second terminals. The first and second terminals are coupled together via a branch-interconnection arrangement. The circuit includes a first switched arrangement with a first switch having a first and second switch-terminal. The first switch-terminal is coupled to the common terminal, and a first resistor and a first capacitor are arranged in parallel and coupled between the second switch-terminal and a reference terminal. The circuit also includes a second switched arrangement coupled to the first terminal. The first quarter wavelength transmission line is coupled between the first and second switched arrangements.

Circuit with first and second terminals coupled together via a branch-interconnection arrangement

A semiconductor device may include an antenna array and a grounding assembly configured to at least partially electrically shield the antenna array. The grounding assembly may include a first grounding layer comprising a first plurality of openings and a second grounding layer comprising a second plurality of openings. The second grounding layer may at least partially occlude the first plurality of openings of the first grounding layer when viewed from above the antenna array.

Grounding assembly for a semiconductor device

A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.

Beamformer and method of operation of a beamformer for MIMO antenna system

An integrated circuit comprising a package, phased antenna array and die. The die comprises a plurality of unit cells, wherein each unit cell is divided into quadrants. Each quadrant comprises a receiver terminal located on a first axis, and a transmitter terminal located on a second axis, wherein the first axis is orthogonal to the second axis, and there is mirror symmetry between the nearest neighbour quadrants in the unit cell. The package comprises a plurality of pairs of feed lines, each pair of feed lines comprising a receiver feed line and a transmitter feed line. The receiver feed line is connected to one of the receiver terminals and the transmitter feed line is connected to the transmitter terminal in the same die quadrant. The receiver feed line is orthogonal to the transmitter feed line. Each antenna element is coupled to a respective pair of feed lines.

Single die design for different polarizations

A semiconductor device comprising a substrate, a first integrated circuit package mounted on the substrate, the first integrated circuit package comprising a first antenna sub-array having a uniform pitch, and a second integrated circuit package mounted on the substrate, the second integrated circuit package comprising a second antenna sub-array having a uniform pitch. The second integrated circuit package is mounted adjacent to the first integrated circuit package to form a multi-package module having an antenna array formed of the first antenna sub-array and the second antenna sub-array, wherein the antenna array has a uniform pitch. Also provided is a method of manufacturing a multi-package module and a method of providing package-to-package grounding.

Semiconductor device having uniform multi-package antenna array and method of manufacture

A multiple-input multiple-output (MIMO) antenna system for a mobile cellular network and method is described. The MIMO antenna system includes an array of dual-polarization patch antennas each having first and second polarization feed-points, a first polarization radio chain and a second polarization radio chain. The MIMO antenna system includes a beamformer coupled to the first and second polarization radio chains. The beamformer includes a beamformer channel for a respective feedpoint and further includes a transmit amplifier and a detector (coupler) coupled to a transmit amplifier output. In one mode of operation, a signal is transmitted via the first polarization feed-point of a dual-polarisation patch antennas and a replica of the transmitted signal may be sensed using the coupler at the output of the transmit amplifier and routed via the second polarization radio chain to a digital predistortion module. The digital pre-distortion module is configured to digitally pre-distort a signal for transmission dependent on the replica of the RF signal.

MIMO antenna system and method

A Radio Frequency, 'RF', component and a method of making the same. The component includes a first electrically conductive signal member for conveying an RF signal and a second electrically conductive signal member for conveying an RF signal. The component also includes a barrier located between the first signal member and the second signal member electromagnetically to shield the first and second signal members from each other. The barrier includes a first row of electrically conductive shielding members spaced apart along a longitudinal axis of the first row, and a second row of electrically conductive shielding members spaced apart along a longitudinal axis of the second row. Each shielding member includes a polyhedron. The shielding members of the first row are offset with respect to the shielding members of the second row to prevent a direct line of sight between the first signal member and the second signal member.

RF component and method

A power combiner/splitter for multiple input multiple output (MIMO) applications and a method of making the same. A metallisation stack has a plurality of layers including patterned metal features forming first and second branched arrangements of the power combiner/splitter. Each branched arrangement includes a port located at one end of that branched arrangement, and a plurality of further ports. Each branched arrangement also includes a plurality of bifurcated branches extending between each end of that branched arrangement for dividing/combining a signal passing through that branched arrangement between the port and the plurality of further ports. The metallisation stack further includes a common ground plane that is shared by the first and second branched arrangements. At least some of the patterned metal features forming the first branched arrangement overlie at least some of the patterned metal features forming the second branched arrangement.

Power combiner/splitter for millimetre wave applications

A transmission line. The transmission line includes a reference electrode. The transmission line also includes a stripline. The stripline meanders within a plane. The stripline has a non-planar profile when viewed along a direction parallel to the plane.

Transmission line comprising a layered stacked including metal and dielectric layers defining a stripline which is configured to meander in perpendicular meandering planes

A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.

Low loss transmission line comprising a signal conductor and return conductors having corresponding curved arrangements

An inductor and a method of making an inductor. The inductor includes a stack of dielectric layers. The inductor also includes a plurality of metal levels comprising patterned metallic features of the inductor. Each metal level is located at an interface between adjacent dielectric layers in the stack. The patterned metallic features include a first plurality of inductor windings arranged in a substantially flat spiral in one of the metal levels. The patterned metallic features also include a second plurality of inductor windings in which each winding is located in a respective one of the plurality of metal levels. The first plurality of windings is connected in series with the second plurality of windings.

Inductor and method of making an inductor

A power amplifier cell comprising a first power amplifier, a second power amplifier and a balun. The balun comprises a first inductor and a second inductor that define a first transformer; and a third inductor and a fourth inductor that define a second transformer. The following: (i) a parasitic capacitance of the first power amplifier; (ii) a leakage inductance of the first transformer; and (iii) a capacitive coupling between the first inductor and the second inductor, contribute to a first impedance matching circuit for the first power amplifier. Also, the following (iv) a parasitic capacitance of the second power amplifier; (v) a leakage inductance of the second transformer; and (vi) a capacitive coupling between the third inductor and the fourth inductor, contribute to a second impedance matching circuit for the second power amplifier.

Power amplifier cell

An outphasing amplifier having: a first branch arranged to receive and process a first branch signal, the first branch signal being phase modulated, with constant amplitude envelope; and a second branch arranged to receive and process a second branch signal, the second branch signal being phase modulated, with constant amplitude envelope, and at least a portion of the second branch signal anti-phase from the first branch signal, wherein each branch includes: circuitry arranged to process the signal to reduce the energy in sidebands of the signal away from the central frequency, while retaining the phase information in the signal; and an amplifier arranged to amplify the filtered and re-asserted branch signal.

Outphasing amplifier

An amplifier circuit comprising a driver () configured to provide a switched mode input signal, a switching mode power amplifier () configured to receive the switched mode input signal and provide an output signal for an external load (); and a sensor () configured to sense the impedance of the external load () The driver is configured to set the duty cycle of the switched mode input signal in accordance with the sensed impedance of the external load ().

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Eindhoven, Netherlands

Mustafa Acar