Growing community of inventors

Westford, MA, United States of America

Murat Belge

Average Co-Inventor Count = 1.75

ph-index = 10

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 293

Murat BelgeDavid H Koh (11 patents)Murat BelgeMichael A Tzannes (5 patents)Murat BelgeHalil Padir (5 patents)Murat BelgePieter Johannes Mosterman (4 patents)Murat BelgeChristopher C Cunningham (3 patents)Murat BelgeZijad Galijasevic (2 patents)Murat BelgeRainer Storn (2 patents)Murat BelgeJames K Weixel (2 patents)Murat BelgeAntonin Ancelle (1 patent)Murat BelgeMazen Kachmar (1 patent)Murat BelgeMurat Belge (31 patents)David H KohDavid H Koh (31 patents)Michael A TzannesMichael A Tzannes (47 patents)Halil PadirHalil Padir (16 patents)Pieter Johannes MostermanPieter Johannes Mosterman (133 patents)Christopher C CunninghamChristopher C Cunningham (11 patents)Zijad GalijasevicZijad Galijasevic (8 patents)Rainer StornRainer Storn (8 patents)James K WeixelJames K Weixel (3 patents)Antonin AncelleAntonin Ancelle (1 patent)Mazen KachmarMazen Kachmar (1 patent)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Aware, Inc. (15 from 208 patents)

2. The Mathworks, Inc. (12 from 1,125 patents)

3. Broadcom Corporation (3 from 11,124 patents)

4. Infineon Technologies Ag (1 from 14,724 patents)

5. Avago Technologies International Sales Pte. Limited (901 patents)


31 patents:

1. 10884712 - Component-based framework for generating device driver model elements

2. 9946668 - Automatic prioritization of interrupts in a modeling environment

3. 9569179 - Modifying models based on profiling information

4. 9442696 - Interactive partitioning and mapping of an application across multiple heterogeneous computational devices from a co-simulation design environment

5. 9317331 - Interactive scheduling of an application on a multi-core target processor from a co-simulation design environment

6. 9191066 - Systems and methods for loop length and bridged tap length determination of a transmission line

7. 9015684 - Profiler-based optimization of automatically generated code

8. 8958466 - Systems and methods for loop length and bridged tap length determination of a transmission line

9. 8949532 - Automatic generation of cache-optimized code

10. 8903049 - Systems and methods for characterizing transmission lines using broadband signals in a multi-carrier DSL environment

11. 8743937 - Systems and methods for characterizing transmission lines using broadband signals in a multi-carrier DSL environment

12. 8706964 - Automatic generation of cache-optimized code

13. 8687680 - Systems and methods for loop length and bridged tap length determination of a transmission line

14. 8595439 - Optimization of cache configuration for application design

15. 8559489 - Systems and methods for characterizing transmission lines using broadband signals in a multi-carrier DSL environment

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12/27/2025
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