Kioxia Corporation

Muneyuki Tsuda

Tatsufumi Hamada

Shinichi Sotome

Tomohiro Kuki

Yosuke Mitsuno

Nayuta Kariya

A semiconductor device according to an embodiment includes a plurality of conductive layers stacked apart from each other and extending in a plate shape in a direction crossing a stacking direction; a channel body including a semiconductor film and penetrating the plurality of conductive layers; a memory film including a charge accumulation film and provided between the plurality of conductive layers and the channel body; and a high dielectric constant (high-k) film arranged between the plurality of conductive layers and the memory film while being divided in a circumferential direction surrounding the memory film.

Semiconductor device

According to one embodiment, a semiconductor storage device includes a substrate, a first electric charge holder, and a channel layer. At least a part of the first electric charge holder is curved in a first cross section along a surface of the substrate. The channel layer is inside the first electric charge holder in the first cross section. At least a part of the channel layer is curved in the first cross section. The first electric charge holder has a curvature varying in accordance with a position in the first cross section. The channel layer has a film thickness varying in accordance with the curvature of the first electric charge holder in the first cross section.

Semiconductor storage device and method of manufacturing semiconductor storage device

A semiconductor memory device includes first conductive layers, second conductive layers, a semiconductor layer disposed between the first conductive layers and the second conductive layers, and a charge storage layer including a first part disposed between the first conductive layers and the semiconductor layer and a second part disposed between the second conductive layers and the semiconductor layer. This semiconductor memory device is configured to execute a first write operation in which a first program voltage is supplied to a third conductive layer which is one of the first conductive layers and a write pass voltage is supplied to a fourth conductive layer which is another of the first conductive layers, and a second write operation in which a second program voltage is supplied to the third conductive layer and to the fourth conductive layer.

Semiconductor memory device

A semiconductor memory device includes: a memory cell array including a plurality of conductive layers, a semiconductor layer, and charge accumulating sections; and a control circuit that executes an erase operation. The erase operation includes an erase mode that executes a first erase flow. The first erase flow includes: a first write operation in which a first program voltage is applied to the plurality of conductive layers; a first erase operation that is executed after the first write operation, and in which, while a first voltage is applied to a first conductive layer, a voltage higher than the first voltage is applied to the second conductive layer; and a second erase operation that is executed after the first erase operation, and in which, while the first voltage is applied to a second conductive layer, a voltage higher than the first voltage is applied to the first conductive layer.

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Ichinomiya, Japan

Muneyuki Tsuda