Sharp Kabushiki Kaisha Corporation

Munetaka Masaki

Yasumichi Mori

Shinsuke Anzai

Masahiko Watanabe

Takahiko Yoshimoto

Takeshi Nojima

Two bias circuits which supply a current to a selected memory cell and a reference memory cell have the same circuit constitution. Each bias circuit includes a first active element between a power supply node and a junction node, where a current is controlled to prevent a voltage level at the junction node from fluctuating, a second active element between the power supply node and an output node, where a current is controlled such that a voltage level at the output node is changed in direction opposite to a voltage level at the junction node in other bias circuit, a third active element and a fourth active element between the junction node and a current supply node and between the output node and the current supply node, respectively, where a bias voltage is adjusted.

Growing community of inventors

Sakurai, Japan

Munetaka Masaki