Hitachi, Ltd.

Renesas Technology Corp.

Hitachi Tohbu Semiconductor, Ltd.

Renesas Electronics Corporation

Other

Renesas Eastern Japan Semiconductor, Inc.

Munehisa Kishimoto

Toshinori Hirashima

Toshiyuki Hata

Ryoichi Kajiwara

Masahiro Koizumi

Kazuya Takahashi

Hiroshi Sato

Keiichi Ookawa

Shigeru Ishii

Toshiaki Morita

Kunio Matsumoto

Akira Tanaka

Yasushi Takahashi

Akira Yamagiwa

Aizo Kaneda

Kazuji Yamada

Ichio Shimizu

Toshio Hatada

Yuji Shirai

Kazuo Hirota

Suguru Sakaguchi

Michiharu Honda

Hiroichi Shinohara

Takao Ohba

Kooji Serizawa

Hitoshi Yoshidome

Toru Yoshida

Hiroshi Satou

Hiroi Oka

Noboru Sakata

Toshiak Morita

Kouichi Fujiwara

Hidekazu Komura

Miyoshi Kimura

Shingo Yorisaki

Masaaki Mutoh

Isao Ohomori

Akira Higuchi

A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Mosfet package

A semiconductor device featuring a semiconductor chip having a first main surface and a second, opposing main surface and including a MOSFET having source and gate electrodes formed on the first main surface and a drain electrode thereof formed on the second main surface, first and second conductive members acting as lead terminals for the source and gate electrodes, respectively, are disposed over the first main surface, each of the first and second conductive members has a part overlapped with the chip in a plan view, a sealing body sealing the chip and parts of the first and second conductive members such that a part of the first conductive member is projected outwardly from a first side surface of the sealing body and parts of the first and second conductive members are projected outwardly from the opposing second side surface of the sealing body in a plan view.

A semiconductor device features a semiconductor chip including a MOSFET, a first electrode of the MOSFET disposed on an obverse surface of the chip, a second, control electrode of the MOSFET disposed on the obverse surface, a third electrode of the MOSFET disposed on a second, opposing surface of the chip, first, second, and third conductive members, each having top surface and opposing bottom surface, the first, second, and third conductive members connecting with the first, second, and third electrodes electrically, respectively, a sealing body having top and bottom surfaces and sealing parts of the first, second, and third conductive members, the first conductive member having first, second, and third contiguous portions, the first portion is positioned over the first electrode, the second is positioned between the first and second portions and the third portion is positioned under the obverse surface of the chip.

Semiconductor device

A semiconductor device features a semiconductor substrate with a MOSFET, an electrode for main current of the MOSFET disposed on a first major surface of the substrate, an electrode for control of the MOSFET disposed on the first major surface, a rear plane electrode of the MOSFET disposed on a second, opposing surface of the substrate, and an external connection terminal electrically connected to the rear plane electrode, the external electrode contains a first part, a second part and a third part, the first part is positioned over the rear plane electrode, the third part is positioned below the second major surface and the third part is connected via the second part to the first part.

MOSFET package

A semiconductor device and method having high output and having reduced external resistance is reduced and improved radiating performance. A MOSFET () has a connecting portion for electrically connecting a surface electrode of a semiconductor pellet and a plurality of inner leads, a resin encapsulant (), a plurality of outer leads (), () protruding in parallel from the same lateral surface of the resin encapsulant () and a header () bonded to a back surface of the semiconductor pellet and having a header protruding portion () protruding from a lateral surface of the resin encapsulant () opposite to the lateral surface from which the outer leads protrude, wherein the header () has an exposed surface () exposed from the resin encapsulant (); the outer leads (), () are bent; and the exposed of the outer leads (), () are provided at substantially the same height.

Semiconductor device and a method of manufacturing for high output MOSFET

A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.

Semiconductor device and a method of manufacturing the same

Semiconductor device and method of manufacture thereof

The semiconductor device includes a semiconductor chip having a first electrode and a second electrode formed on a first main surface and a third electrode formed on a second main surface opposite the first main surface. A first portion of a first lead is placed on the first electrode and a second portion of the first lead is located outside the semiconductor chip. A first portion of a second lead is placed on the second electrode and a second portion of the second lead is located outside the semiconductor chip. A plurality of projecting electrodes are provided between the first portion of the first lead and the first electrode and between the first portion of the second lead and the second electrode to electrically connect them. An insulating sheet is provided between the first portion of the first lead and the first main surface of the semiconductor chip and between the first portion of the second lead and the first main surface of the semiconductor chip. The insulating sheet covers the first main surface of the semiconductor chip in areas other than a region in which the plurality of projecting electrodes are provided.

Method of manufacturing a semiconductor package by attaching a lead frame to a semiconductor chip via projecting electrodes and an insulating sheet of resin material

Growing community of inventors

Kamakura, Japan

Munehisa Kishimoto