Applied Materials, Inc.

Lam Research Corporation

Ceradyne, Inc.

Mukund Srinivasan

Rajinder Dhindsa

Abhijit Basu Mallick

Eric H Lenz

Susmit Singha Roy

Hari K Ponnekanti

Tomohiko Kitajima

Chang Seok Kang

Camelia Rusu

Aaron Eppler

Jingmei Liang

Lumin Li

Gill Yong Lee

Juan Carlos Rocha-Alvarez

Eric A Hudson

Pramit Manna

Bok Hoen Kim

Andreas Fischer

Karthik Janakiraman

Rui Cheng

Felix Leib Kozakevich

Tza-Jing Gung

Xinhai Han

Richard Alan Gottscho

Sanjay S Natarajan

Takehito Koshizawa

Sung-Kwan Kang

Juan Carlos Rocha

Jinrui Guo

Jung Chan Lee

Srinivas Gandikota

Deenesh Padhi

Alexandros T Demos

Peter K Loewenhardt

Gaurav Thareja

Jian J Chen

Swaminathan T Srinivasan

Praket Prakash Jha

Nagarajan Rajagopalan

Yong Sun

Sung Hyun Hong

Ludovic Godet

Srinivas D Nemani

Ellie Y Yieh

Hiroji Hanawa

Alexei Marakhtanov

Ganesh Balasubramanian

Kelvin Chan

Amit Kumar Bansal

Jeffrey S Marks

Qian Fu

Jianhua Zhou

S M Reza Sadjadi

Kwangduk Douglas Lee

Mandyam Sriram

Jay D Pinson, Ii

Young Seen Lee

Ren-Guan Duan

Prashant Kumar Kulshreshtha

Yihong Chen

Zheng John Ye

Konstantin Makhratchev

Kenji Takeshita

Robert P Chebi

Jun Xue

Dale R Dubois

Travis R Taylor

Masaki Ogata

Xing Lin

Zhisong Huang

Sungwon Ha

Yongmei Chen

Yongjing Lin

Kiran V Thadani

Biljana Mikijelj

Raj Dhindsa

Swayambhu Prasad Behera

Brian Saxton Underwood

Dave Trussell

Zhonghua Yao

Yusheng Zhou

Uwe Paul Haller

Jason K Foster

Bobby Kadkhodayan

K Y Ramanujam

Shanghua Wu

Jim Tietz

Balasubramanian Pranatharthiharan

Reza S M Sadjadi

Described is a memory device including a plurality of memory cells formed around a memory hole extending through a memory stack on a substrate. Each of the plurality of memory cells comprises a discrete blocking oxide layer, a charge trap layer, and a tunnel oxide layer. The blocking oxide layer is discrete between each of the plurality of memory cells. The tunnel oxide layer is continuous between each of the plurality of memory cells, and the charge trap layer is discrete between each of the plurality of memory cells. The charge trap layer has a first thickness on a top portion and a second thickness on a center portion, the first thickness different than the second thickness.

NAND cell structure with charge trap cut

Exemplary semiconductor processing methods may include depositing a boron-containing material on the substrate. The boron-containing material may extend along sidewalls of the one or more features in the substrate. The methods may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a portion of the one or more features in the substrate. The contacting may oxidize the boron-containing material.

Sidewall passivation for plasma etching

Apparatus and methods to process a substrate comprising a gas distribution assembly comprising a plasma process region with an array of individual plasma sources. A controller is connected to the array of individual plasma sources and the substrate support. The controller is configured monitor the position of the at least one substrate and provide or disable power to the individual plasma sources based on the position of the substrate relative to the individual plasma sources.

Dynamic phased array plasma source for complete plasma coverage of a moving substrate

Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

Conformal high concentration boron doping of semiconductors

Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

Methods and apparatus for three dimensional NAND structure fabrication

Embodiments described herein relate to manufacturing layer stacks of oxide/nitride (ON) layers with minimized in-plane distortion (IPD) and lithographic overlay errors. A method of forming a layer stack ON layers includes flowing a first silicon-containing gas, an oxygen-containing gas, and a first dilution gas. A RF power is symmetrically applied to form a first material layer of SiO. A second silicon-containing gas, a nitrogen-containing gas, and a second dilution gas are flowed. A second RF power is symmetrically applied to form a second material layer of SiN. The flowing the first silicon-containing gas, the oxygen-containing gas, and the first dilution gas, the symmetrically applying the first RF power, the flowing the second silicon-containing gas, the nitrogen-containing gas, and the second dilution gas, and the symmetrically applying the second RF power is repeated until a desired number of first material layers and second material layers make up a layer stack.

On stack overlay improvement for 3D NAND

Methods of manufacturing memory devices are provided. The methods decrease the thickness of the first layers and increase the thickness of the second layers. Semiconductor devices are described having a film stack comprising alternating nitride and second layers in a first portion of the device, the alternating nitride and second layers of the film stack having a nitride:oxide thickness ratio (N:O); and a memory stack comprising alternating word line and second layers in a second portion of the device, the alternating word line and second layers of the memory stack having a word line:oxide thickness ratio (W:O), wherein 0.1(W:O)&#x3c;N:O&#x3c;0.95(W:O).

3D-NAND mold

Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.

Cyclic flowable deposition and high-density plasma treatment processes for high quality gap fill solutions

A system for processing a substrate is provided including a first planar motor, a substrate carrier, a first processing chamber, and a first lift. The first planar motor includes a first arrangement of coils disposed along a first horizontal direction, a top surface parallel to the first horizontal direction, a first side, a second side. The substrate carrier has a substrate supporting surface parallel to the first horizontal direction. The first processing chamber has an opening to receive a substrate disposed on the substrate carrier. The first lift includes a second planar motor having a second arrangement of coils disposed along the first horizontal direction. A top surface top surface of the second planar motor is parallel to the first horizontal direction. The first lift is configured to move the top surface of the second planar motor between a first vertical location and a second vertical location.

Semiconductor process equipment

Implementations disclosed herein relate to methods for forming and filling trenches in a substrate with a flowable dielectric material. In one implementation, the method includes subjecting a substrate having at least one trench to a deposition process to form a flowable layer over a bottom surface and sidewall surfaces of the trench in a bottom-up fashion until the flowable layer reaches a predetermined deposition thickness, subjecting the flowable layer to a first curing process, the first curing process being a UV curing process, subjecting the UV cured flowable layer to a second curing process, the second curing process being a plasma or plasma-assisted process, and performing sequentially and repeatedly the deposition process, the first curing process, and the second curing process until the plasma cured flowable layer fills the trench and reaches a predetermined height over a top surface of the trench.

A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

Dielectric-metal stack for 3D flash memory application

A method and apparatus for forming a flowable film are described. The method includes providing an oxygen free precursor gas mixture to a processing chamber containing a substrate. The oxygen free precursor gas is activated by exposure to UV radiation in the processing chamber. Molecular fragments resulting from the UV activation are encouraged to deposit on the substrate to form a flowable film on the substrate. The substrate may be cooled to encourage deposition. The film may be hardened by heating and/or by further exposure to UV radiation.

Photo-assisted deposition of flowable films

Growing community of inventors

Fremont, CA, United States of America

Mukund Srinivasan