Hewlett-Packard Company

Agilent Technologies, Inc.

Mukesh P Patel

Samuel A Johnson

Timothy V Harper

Amit P Agrawal

A ball grid technology circuit assembly for mounting and connecting a ball grid array circuit package having a grid array of ball pads to a printed circuit board and providing enhanced connections for testing of the ball grid array circuits. The printed circuit board includes a via array of vias wherein each via extends from the upper face of the printed circuit board to a lower face of the printed circuit board and is co-located with a ball pad of the ball grid array to provide a path between the ball pad and the lower end of the via to provide electrical access to the corresponding ball pad. A probe array includes a pin array of probe pins wherein each probe pin is co-located with a via of the via array to provide electrical contact with a ball pad of the ball grid array. The probe array is mounted in a probe block and the probe block and printed circuit board include alignment holes and alignment pins for aligning the probe array with the vias and a probe attachment to secure the probe block to the ball grid array technology circuit assembly.

Method and apparatus for testing of ball grid array circuitry

A low inductance integrated circuit package such as a ball grid array having mounting conductors formed on a first side thereof and a die attachment region formed on second side thereof. A plurality of conductors internal to the package interconnect the mounting conductors to the die attachment region. A plurality of diagnostic contact pads are connected to the conductors and configured for ready access by a test probe. The contact pads are preferably provided at a periphery of the package.

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Boise, ID, United States of America

Mukesh P Patel